1. 1 Task Leader : Alex Orailoglu, UC San Diego Students : Rasit Onur Topaloglu, UC San Diego, 2007 Industrial Liaisons : Hosam Haggag, National Semiconductor Corp. Patrick Drennan, Freescale Semiconductor, Inc. Mien Li, Advanced Micro Devices, Inc. “Mismatch analysis for high speed, deep sub-micron blocks and simulation methodology” Task ID:906.001

2. 2 Technical Thrust : Circuit design Anticipated Result : Mismatch simulation and testing methods, with possible implementation in an EDA environment Task Description : Provide measurement, simulation, test and verification methods for mismatch for deep-submicron technologies Task Deliverables : Report on developing a mismatch test methodology  Report on developing level 1 sensitivity functions

3. 3 Accomplishments During the Past Year :  Devised a test generation methodology to target mismatch  Devised a general methodology to derive sensitivity functions for mismatch  Devised Forward Discrete Probability Propagation Method for estimation of high level parameter probability distributions Future Direction :  Implementation of these techniques at behavioral levels : will enable ability to use along with HDL, ex.Verilog-AMS Executive Summary

4. 4 Technology Transfer & Industrial Interactions :  Monthly telephone communications to National Semiconductor on project progress  Internship at National Semiconductor Publications :  SRC Deliverable Reports : ( P007960 and P009498 )  On Mismatch in the Deep Sub-micron Era : From Physics to Circuits, ASPDAC 2004 Executive Summary

5. 5 Task Leader : Alex Orailoglu, UC San Diego Students : Ayse K. Coskun, UC San Diego, 2008 Chengmo Yang, UC San Diego, 2008 Industrial Liaisons : Hosam Haggag, National Semiconductor Corp. “Mismatch for Next Generation” Task ID: 1184.001

6. 6 Technical Thrust : Circuit design Anticipated Result : A wafer-aware and design-to- avoid mismatch design flow for mixed-signal and RF circuits implemented in an EDA environment. Task Description : Provide mismatch-immune design and analysis methodologies including parasitics and passives Task Deliverables : Report on MINT models Report on mismatch verification and diagnosis, Nov04

7. 7 Technology Transfer & Industrial Interactions :  Monthly telephone communications to National Semiconductor on project progress Executive Summary Future Direction :  Discovery of mismatch integrated models and diagnosis Techniques to target mismatch

8. 8 Outline Mismatch Amplification Test Generation Test of Mismatch Forward Discrete Probability Propagation Probability Discretization Theory Q, F, B, R Operators and r-domain Experimental Results Conclusions Motivation Excitation Plots Mismatch Factor

9. 9 Test of Mismatch

10. 10 Motivation for Testing Find an analogous specialized test for mismatch Functional testing is not the only method for digital circuits While testing for stuck-at faults, other faults typically discovered also GOALS Low cost : measured in terms of speed and price of tester Separate design from test : to earn test engineers time Determinism : to provide pass and fail information

11. 11 Mismatch Amplification Activate the defect, then propagate Aim is to differentiate circuit response from the nominal Bias, voltage, temperature and input used to amplify mismatch

12. 12 Excitation Plots Gain @100kHz vs. Widths of matched pair Dispersion from matched condition leads to appreciable reduction in observed parameter, ex. gain Equal width variations in the pair => negligible reduction no-mismatch diagonal max-mismatch diagonal

13. 13 Deteriorating Effects of Mismatch Gain @100kHz vs. Widths of matched pair A wider range of equal variations on no-mismatch diagonal => still negligible reduction no-mismatch diagonal

14. 14 Separation of Responses Frequency response DC response Fault-free responses are separated Fault-free responses sit on no-mismatch diagonal Vertical cuts are used in excitation plots for over-a-range plots

15. 15 Mismatch Factor 3-D response, when sampled, can be represented as a matrix Mismatch Factor (MF) gives a degree of mismatch effect in circuit for some parameter, ex. t ox on an analysis, ex. sampled AC gain ∆1∆1 ∆2∆2 stepsize Matrix representation of response: High MF => small mismatch causes appreciable impact

16. 16 Other Observed Excitation Plots MF still effective due to symmetric nature Sens. of AC gain to bias Sens. of AC gain to VDD

17. 17 Test Algorithm  Mismatch (mm) pair,  physical parameter,  worst-case (V,T), obtain MF’s; select largest ones.

18. 18 Input and Analysis Choices Bias, voltage, temperature and input signal Input Choices AC magnitude response : powerful for wide-band circuits Analysis Choices DC response : to be used for digital circuits Sensitivities of these : wrt. circuit biases and inputs IDDQ : identified as being succesful for analog mismatch Use circuit specs to constraint ranges: ex. AC or VDD range

19. 19 Test Generation Ex. : high coverage AC 100kHz AC 2GHZ DC Vin=1.4V DC Vin=1.5V IDDQ S AC 100kHz Vbias1 S AC 100kHz Vbias2 S AC 2GHz Vbias1 S AC 2GHz Vbias2 S AC 100kHz Vbias1 S AC 100kHz Vbias2 S AC 2GHz Vbias1 S AC 2GHz Vbias2 S IDDQ Vbias1 S IDDQ Vbias2 {VDD1, VDD2, T1, T2} W, mm1 W, mm2.. V FB, mmN.. Each entry  excitation plot  MF  analysis type Analysis Types  physical param. and mm pair, select highest MF in each row

20. 20 Test Generation Example : low cost AC 100kHz AC 2GHZ DC Vin=1.4V DC Vin=1.5V IDDQ S AC 100kHz Vbias1 S AC 100kHz Vbias2 S AC 2GHz Vbias1 S AC 2GHz Vbias2 S AC 100kHz Vbias1 S AC 100kHz Vbias2 S AC 2GHz Vbias1 S AC 2GHz Vbias2 S IDDQ Vbias1 S IDDQ Vbias2 {VDD1, VDD2, T1, T2, mm1, mm2,..,mmN} W t ox.. V FB.. Each entry  excitation plot  MF  analysis type Analysis Types  physical parameter, select highest MF in each row

21. 21 Test Set for Low Cost Example AC 2GHZ :Apply 1mV input AC at 3.3V, 300K, find AC gain DC Vin=1.4V : Apply 1.4V input DC 2.7V, 200K, find DC gain IDDQ : At 3.3V, 300K, find power supply current S AC 2GHz Vbias1 S AC 100kHz Vbias2 S IDDQ Vbias2 W This test set targets the Width mismatch in the circuit : Apply 1mV input AC at 2.7V, 200K; then change Vbias1 by 10% and repeat : Apply 1mV input AC at 2.7V, 200K; then change Vbias2 by 10% and repeat : At 2.7V, 200K, find power supply current; then change Vbias2 by 10% and repeat If mismatch in Width parameter present, results differ appreciably

22. 22 Test Set Size and Verification Reduction in number of test vectors intrinsic As simulation based, verification also intrinsic Apply this test set before any functional test, as this test catches most hard faults Test number can be reduced to analysis types*physical parameters Test number is analysis types*physical parameters*mismatch pairs for increased fault coverage

23. 23 Outline Mismatch Amplification Test Generation Test of Mismatch Forward Discrete Probability Propagation Probability Discretization Theory Q, F, B, R Operators and r-domain Experimental Results Conclusions Motivation Excitation Plots Mismatch Factor

24. 24 Forward Discrete Probability Propagation

25. 25 Motivation for Probability Propagation Find a novel propagation method Estimation of circuit parameters needed to examine effects of process variations Gaussian assumption attributed to device parameters no longer accurate GOALS Determinism : a stochastic output using known formulas Algebraic tractability : enabling manual applicability Speed & Accuracy : be comparable or outperform Monte Carlo

26. 26 Shortcomings of Monte Carlo Non-determinism : Not manually applicable Limited for certain distributions : Random number generators only provide certain distributions Accuracy : May miss points that are less likely to occur due to random sampling; limited by the performance of random number generator

27. 27 spdf(X) or  (X) pdf(X) p-domainr-domain Probability Discretization Theory : Q N Operator; p and r domains Q N band-pass filter pdf(X) and divide into bins N in Q N indicates number or bins Certain operators easy to apply in r-domain

28. 28 spdf(X) or  (X) r-domain Characterizing an spdf can write spdf(X) as : where : p i : probability for i’th impulse w i : value of i’th impulse

29. 29 F Operator F operator implements a function over spdf’s spdf(X) or  (X) X i, Y : random variables p X s : Set of all samples s belonging to X Function applied to individual impulses Individual probabilities multiplied

30. 30 Band-pass, B e, Operator Eliminate samples having values out of range Margin-based Definition: Error-based Definition: Eliminate samples having probabilities least likely to occur

31. 31 Re-bin, R N, Operator Samples falling into the same bin congregated in one where : Impulses after F Unite into one  bin Resulting spdf(X)

32. 32 The Necessity of Re-binning Non-linear nature of functions cause accumulation in certain ranges Band-pass and re-bin operations needed after F operation Impulses after F, before B and R

33. 33 Error Analysis Total distortion: Variance of quantization error: If quantizer uniform and  small, quantization error random variable Q is uniformly distributed Distortion caused by representing samples in a bin by a single sample: m i : center or i’th bin

34. 34 Connectivity Graph Used in Experiments Connectivity Graphs can tie physical parameters to circuit parameters

35. 35 Algorithm Implementing the F Operator While each random variable has its spdf computed For each rv. which has all ancestor spdf’s computed For each sample in X 1 For each sample in X r Place an impulse with height p 1,..,p r at x=f(v 1,..,v r ) Apply B and R algorithms to this rv.

36. 36 Algorithm for the B and R Operators Divide this range into M bins For each bin Place a quantizing impulse at the center of the bin with a height p i equal to the sum of all impulses within bin Find maximum probability, p i-max, of quantized impulses within bins Find new maximum and minimum values w i within impulses Divide this range into N bins Find maximum and minimum values w i within impulses Eliminate impulses within bins which have a quantized impulse with smaller probability than error-rate*p i-max For each bin Place an impulse at the center of the bin with height equal to sum of all impulses within bin

37. 37 T NSUB PHIf Q, F, B, R on a Connectivity Graph QQ F B,R Repeated until we get the high level distribution Useful for device characterization also

38. 38 Experimental Results Impulse representation for threshold voltage and transconductance are obtained through FDPP on the graph  (X) for gm  (X) for V th

39. 39 A close match is observed after interpolation Monte Carlo – FDPP Comparison solid : FDPP dotted : Monte Carlo Pdf of V th Pdf of I D

40. 40 Monte Carlo – FDPP Comparison with a Low Sample Number Monte Carlo inaccurate for moderate number of samples Indicates FDPP can be manually applied without major accuracy degradation solid : FDPP,100 samples Pdf of  F noisy : Monte Carlo, 1000 and 100000 samples respectively

41. 41 P1 P2 Monte Carlo – FDPP Comparison one-to-many relationships and custom pdf’s P3 P4 Custom pdf’s not possible without a custom random number generator Monte Carlo overestimates for one-to-many relationships as same sample is used

42. 42 Conclusions A specialized test selection mechanism for mismatch is introduced Forward Discrete Probability Propagation is introduced as an alternative to Monte Carlo based methods FDPP should be preferred when low probability samples are important, algebraic intuition needed, custom pdf’s are present or one-to-many relationships are present Test of Mismatch is a deterministic, general and low-cost methodology