Features of i7 Micro processor Quad Core Processor — Supports 4 core on single die — 3 level (L1,L2,L3)cache — 8 dedicated threads for multitasking and multithreaded operation Integrated memory controller — Supports DDR3( Double data RAM) — DDR3 used for storage at high speed — Allows I/O bus to run 4 times faster Execute Disable Bit — Provides enhanced virus protection — Execute Disable Bit allows memory to be marked as executable or non executable — it raises an error to OS if code is run in non executable memory
Features of i7 Micro processor Hyper threading technology — one physical processor seems like two logical processor — improves performance in multitasking — execution unit,caches, buses are shared —logical processor has data reg, segment reg, control reg, debug reg — i7 processor can process 2 thread simultaneously — it appears to OS as 8 CPUs Turbo Boost Technology — allows processor to run faster than base operating frequency — power of passives cores are provided to the active cores — it can increase frequency of all 4 cores till they can handle current payload — it does not require any hardware support — It can enable/disable by OS and BIOS
Features of i7 Micro processor Enhanced speed step technology — running processor at high clock speeds for better performance — If operating on low frequency, less heat generated then less power consumption Intel Quick Path Interconnect(QPI) — used to link processor and system components — provide higher memory performance and flexibility — replaces front side bus — QPI high speed data transfer up to 25.6 Gbps —Concurrent bi-directional traffic Virtualization technology — one hardware platform to function a multiple virtual platform Trusted Execution technology —hardware based mechanism to help protect against s/w based attacks —It helps to protect the confidentiality and integrity of data —by enabling trusted environment application can run in their own space
Features of i7 Micro processor Smart cache and cache memory — 3 level (L1,L2,L3)cache — level 1 L1 cache 32 KB each (instruction and data) — level 2 L2 cache 256 KB ( combined instruction and data) — level 3 L3 cache 8 MB ( used for communication for different cores of processor) Inclusive shared 8 MB L3 cache L2 cache 256 kb L1 cache 32 kb Core 1 L2 cache 256 kb L1 cache 32 kb Core 2 L2 cache 256 kb L1 cache 32 kb Core 3 L2 cache 256 kb L1 cache 32 kb Core 0
Registers f i7 Micro processor 16 GPRS 64 bit wide 6 segment reg 16 bit wide Rflag reg 64 bit wide RIP reg 64 bit 8 MMX reg 64 bit wide 16 XMM registers 128 bit wide MXCSR reg 32 bit wide 8 FPU data reg 80 bit wide 1 control reg 16 bit wide 1 status reg 16 bit wide 1 tag reg 16 bit wide 11 bit opcode reg 64 bit FPU data pointer reg 64 bit FPU instruction pointer reg
Your consent to our cookies if you continue to use this website.