1. EXPLAINING PRINCIPLES REGISTER APPLYING BASICS DIGITAL ENGINEERING By Sri Wahyuni

2. Teknologi dan Rekayasa DIRECTION Participant be able to: 1.Explain the functions of the register 2.Explain the functions of clock 3.Explain the functions of Flip-flop 4.Explain the functions and Counter register

3. CLOCK Teknologi dan Rekayasa Including the series of clock with Astabil Multivibrator IC 555

4. HOW IT WORKS SERIES CLOCK 1.C at the time charged exceeds the rising threshold voltage + (2 / 3) Vcc. 2.Capacitor C cleared through Rb therefore blanking time convention can be determined with the formula T = Rb x C. 3.Voltage when C is a bit of down + (Vcc / 3) then the output becomes high. 4.Cycle work formulated: W = 0,693 (Rb + RA). C T = 0693. Rb. C T = W + t F = 1 / T Where: W = width of balance; T = time period T = seconds; F = Hert Teknologi dan Rekayasa

5.  Operating system on the balance going digital clock will transition from 0 to 1 or from 1 to 0.  Transition 0-to-1: the rise (rising edge); Transition 1-to-0: the falling (falling edge)

6. FLIP-FLOP  A series of logic with the output of the two opposite each other. Teknologi dan Rekayasa  FF two working conditions: (1) Q = 0, Q’=1 : (2) Q = 1, Q’ = 0.

7. FLIP-FLOP TYPES: 1.RS FLIP-FLOP Teknologi dan Rekayasa RS-FF arranger by NAND gate S BQQ Description 0011 Restricted 0110 Set 1110 Stabil I 1001 Reset 1101 Stabil II 0011 Restricted 11 QnQn QnQn Memory condition Truth Table:

8. 2.CRS FLIP-FLOP Teknologi dan Rekayasa SRQ n +1 00QnQn 010 101 11 Restricted Truth Table:

9. 3.D FLIP-FLOP Teknologi dan Rekayasa DQn+1 0101 0101 Truth Table:

10. 4.T FLIP-FLOP Teknologi dan Rekayasa TQ 00 10 01 11 00 10 01 11 Tabel Kebenaran: Truth Table:

11. 5.J-K FLIP-FLOP Teknologi dan Rekayasa JKQ n +1 Description 00QnQn Memory 010 Reset 101 Set 11 Q n (strep) Togle Truth Table:

12. REGISTER  Order to register the memory with 4-bit DFF: Teknologi dan Rekayasa

13.  4-bit memory register which consists of 4 pieces D FF.  Input data is inserted in parallel to the terminals A, B, C, and D.  In the input data will be transfer to balance the output of each clock is also in parallel. Teknologi dan Rekayasa

14. REGISTER TYPES: 1.REGISTER SISO (Serial Input Serial Output) Teknologi dan Rekayasa Clock keWord inQ1Q2Q3Q4 000000 111000 200100 311010 411101 Truth Table: (Ex entrance 1101)

15. 2.REGISTER SIPO (Serial Input Paralel Output) Teknologi dan Rekayasa Read OutClockInput Q1 Q2 Q3 Q4A B C D 000 0 0 011 1 0 0 00 0 021 1 1 0 00 0 030 0 1 1 00 0 041 1 0 1 10 0 1 1 0 1 1 Truth Table:

16. 3.REGISTER PIPO (Paralel Input dan Paralel Output) Teknologi dan Rekayasa Clock D1 D2 D3 D4QD QC QB QA 0 1 1 0 10 0 1 1 1 0 1 2 1 0 0 1 3 0 0 0 1 Truth Table: TABEL KEBENARAN:

17. 4.REGISTER PISO (Paralel Input Serial Output) Teknologi dan Rekayasa DataICPresetReset 0110 1101 0011 1011 Truth Table:

18. COUNTER There are 2 kinds of counter, namely: 1.Counter sync (syncronuous counters) or counter row. 2.Counter is not synchronized (asyncronuous counters), which is sometimes also called counter array (series counters) or counter ruga (rippIe counters). Teknologi dan Rekayasa

19. COUNTER TYPES 1.Syncronuos Counter :  Counter forward sync that runs continuously (Free Running).  Counter synchronized forward that can stop yourself (Self Stopping).  Counter reverse sync.  Counter forward and reverse sync (Up-down Counter) Teknologi dan Rekayasa

20. 2.Asyncronuos Counter :  Asyncronuos forward counter continuously (Free Running)  Asyncronuos forward counter stopself (Self Stopping).  Asyncronuos back counter  Asyncronuos back and forward counter (Up-down Counter ). Teknologi dan Rekayasa

21. EXEMPLARY COUNTER: Teknologi dan Rekayasa Clock QA QB QC QD Clock QD QC QB QA MSB LSB Desimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1.Asyncronuos forward counter using the 4-JK FF : Timing diagram Truth Table:

22. 2.Asyncronuos back counter Teknologi dan Rekayasa ClockQDQCQBQADesimal 0111115 1111014 2110113 3110012 4101111 5101010 610019 710008 801117 901106 01015 1101004 1200113 1300102 1400011 1500000 16111115 Clock QA QB QC QD Timing diagram Truth Table:

23. 3.Asyncronuos back and forward counter :  Ring Counter Teknologi dan Rekayasa Clock D C B A 012345012345 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 1 Truth Table Ring counter

24.  Johnson Counter Teknologi dan Rekayasa Johnson Counter ClockDCBA 012345678012345678 000011110000011110 000111100000111100 001111000001111000 011110000011110000 Truth Table

25. The End Teknologi dan Rekayasa