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Shift Register Counters

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Presentation on theme: "Shift Register Counters"— Presentation transcript:

1 Shift Register Counters
Morgan Kaufmann Publishers 10 September, 2017 Shift Register Counters Chapter 4 — The Processor

2 Outline Shift Register Counters Ring Counters Johnson Counters

3 Outline Shift Register Counters Ring Counters Johnson Counters

4 Shift Register Counters
Shift register counter: a shift register with the serial output connected back to the serial input. They are classified as counters because they give a specified sequence of states. Two common types: the Johnson counter and the Ring counter.

5 Outline Shift Register Counters Ring Counters Johnson Counters

6 Ring Counters One flip-flop (stage) for each state in the sequence.
The output of the last stage is connected to the D input of the first stage. An n-bit ring counter cycles through n states. No decoding gates are required, as there is an output that corresponds to every state the counter is in.

7 Ring Counters Example: A 6-bit (MOD-6) ring counter. Q0 Q1 Q2 Q3 Q4 Q5
CLK Q0 D Q Q1 Q2 Q3 Q4 Q5 CLR PRE 100000 010000 001000 000100 000010 000001

8 Outline Shift Register Counters Ring Counters Johnson Counters

9 Johnson Counters The complement of the output of the last stage is connected back to the D input of the first stage. Also called the twisted-ring counter. Require fewer flip-flops than ring counters but more flip-flops than binary counters. An n-bit Johnson counter cycles through 2n states. Require more decoding circuitry than ring counter but less than binary counters.

10 Johnson Counters Example: A 4-bit (MOD-8) Johnson counter. CLK Q0 Q1
CLR Q' 0000 0001 0011 0111 1111 1110 1100 1000

11 Johnson Counters Decoding logic for a 4-bit Johnson counter. A' D'
State 0 A B' State 1 B C' State 2 C D' State 3 B' C State 6 A D State 4 C' D State 7 A' B State 5


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