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CENG 241 Digital Design 1 Lecture 11 Amirali Baniasadi

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2 This Lecture zChapter 6: Registers and Counters

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3 Registers zSequential circuits are classified based in their function, e.g., registers. zRegister: A group of flip-flops each storing one bit of information. zRegisters include flip-flops and gates: flip-flops hold the information, gates control how the information is transferred to the register. zCounter is a register that goes through a predetermined sequence of states.

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4 4-bit Register Loads in parallel Clear: Cleans the output to all 0’s.

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5 Register with Parallel Load To fully synchronize the system clock signals should arrive at the same time at all flip-flops. Therefore we do not control the clock by gates. Load = 1, we load data Load =0, register content does not change 1 I0 I3 I2 I

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6 Register with Parallel Load Load =0, register content does not change 0 A0 A3 A2 A

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7 Shift Registers A register capable of shifting its binary information in one or both directions is called the shift register.

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8 Serial Transfer A digital system is in the serial mode when information is processed one bit at a time. Serial transfer of information from A to B:

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9 Remember 4-bit Parallel Adder Circuit?

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10 Serial Addition Slower compared to parallel addition, but uses less equipment.

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11 Serial Adder vs. Parallel Adder zPA uses registers with parallel load, SA uses shift registers. zPA uses more FAs compared to SA. zExcluding the registers, PA is a combinational circuit, SA is sequential.

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12 Serial Adder: Design Procedure zState Table for a Serial Adder: zPresent State Inputs Next State Output Flip-Flop inputs z Q x y Q S J0 K0 z x z x z x z x z x 1 z x 0 z x 0 z x 0 zJ0=xy K0=x’y’= (x+y)’ S=x XOR y XOR z

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13 Serial 4-bit Parallel Adder Circuit

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14 Universal Shift Register zA register capable of shifting in both directions and loading in parallel. Multiplexer Inputs: 0: No Change 1:Shift Right 2:Shift Left 3:Parallel load Controls information transfer Stores Information

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15 Ripple Counters zA register that goes trough a prescribed sequence of states is called a counter. zThere are two groups of counters: Ripple counters and Synchronous counters. zRipple counters: The flip-flop output triggers other flip-flops. zSynchronous counters count the clock.

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16 Binary Ripple Counter zA binary ripple counter consists of a series of complementing flip-flops, with the output of each flip-flop connected to the next higher order. zExamples of complementing flip-flops are T and D (with the output complement connected to the input) flip-flop. zBinary Count Sequence zA3 A2 A1 A0 z A0 is complemented with each count pulse z A1 is complemented when A0 goes from 1 to 0 z A2 is complemented when A1 goes from 1 to 0 z A3 is complemented when A2 goes from 1 to 0 z z z z z

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17 Examples of Binary Ripple Counters

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18 Binary Ripple Counter zCount-down counter: A binary counter with reverse count: Starts from 15 goes down. zIn a count-down counter the least significant bit is complemented with every count pulse. Any other bit is complemented if the previous bit goes from 0 to 1. zWe can use the same counter design with negative edge flip-flops to make a count-down flip-flop.

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19 BCD Ripple Counter A BCD counter starts from 0 ends at 9.

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20 Logic Diagram of BCD Ripple Counter Q1 is applied to the C inputs of Q2 and Q8 Q2 is applied to the C input of Q4 J and K are connected to either 1 or flip-flop outputs

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21 Logic Diagram of BCD Ripple Counter Verification: Does the circuit follow the states? Q1 is complemented with every count (J=K=1) Q2 complements if Q1 goes from 1 to 0 and Q8 is 0 Q2 remains 0 if Q8 becomes 1 Q4 complements if Q2 goes from 1 to 0 Q8 remains 0 as long as Q2 or Q4 is 0 When Q2 and Q4 are 1, Q8 complements when Q1 goes from 1 to 0. Q8 clears and the next Q1 transition.

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22 Three-Decade Decimal BCD Counter Counts from 0 to 999: When Q8 goes from 1 to 0 the next higher order decade is triggered

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23 4-bit Synchronous Binary Counters A flip-flop is complemented if all lower bits are 1. A3 A2 A1 A

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24 4-bit Up-Down Binary Counters In a down binary counter a) The least significant bit is always complemented b) a bit is complemented if all lower bits are 0. Change an up counter to a down counter: The AND gates should come from the complement outputs instead of the normal one Up = 1, Down =0: Circuit counts up since input comes from Normal output Up = 0, Down =1: Circuit counts down since input comes from Complemented output

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25 Binary Counter with Parallel Load zSometimes we need an initial value prior to the count operation. zInitial value: I3 I2 I1 I0

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26 Binary Counter with Parallel Load Count = 1, Load =

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27 Binary Counter with Parallel Load Count = 0, Load = I I3’ I0’ 0 I1 I1’ I2 I2’ I3 I1

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28 BCD counter with parallel load In part a, 1001 is detected. In part b, 1010 is detected. In part a, LOAD is set to 1 and effective next cycle. In part b, counter is immediately cleared

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29 Other Counters: Counters with unused states Present State Next State Flip-Flop Inputs A B C A B C JA KA JB KB JC KC X 0 X 1 X X 1 X X X X 1 0 X X 0 0 X 1 X X 0 1 X X X 1 X 1 0 X JA=KA=B JB=C, KB=1 JC=B’ KC=1

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30 Other Counters: Counters with unused states What happens if we fall in unused states? In this case, 111 results in results in 100. The Counter is self-correcting.

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31 Other Counters: Ring Counter A ring counter is a counter with ONLY 1 flip-flop set to 1 at any particular time, all other are cleared.

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32 Other Counters: Johnson Counter A 4 flip-flop ring counter that produces 8 states (not 4).

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33 Summary zCounters & Registers zReading up to page 269 zHomework 5-Chapter 6 problems 6,7,11,15,18,19,23,29 and 30 Due Wednesday July 30th.

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