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1 Classification of instructions 4-address instructions 3-address instructions 2-address instructions 1-address instructions 0-address instructions.

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Presentation on theme: "1 Classification of instructions 4-address instructions 3-address instructions 2-address instructions 1-address instructions 0-address instructions."— Presentation transcript:

1 1 Classification of instructions 4-address instructions 3-address instructions 2-address instructions 1-address instructions 0-address instructions

2 2 Classification of instructions (continued…) The 4-address instruction specifies the two source operands, the destination operand and the address of the next instruction op codesource 2destinationnext addresssource 1

3 3 Classification of instructions (continued…) A 3-address instruction specifies addresses for both operands as well as the result op codesource 2destinationsource 1

4 4 Classification of instructions (continued…) A 2-address instruction overwrites one operand with the result One field serves two purposes op codedestination source 1 source 2

5 5 Classification of instructions (continued…) A 1-address instruction has a dedicated CPU register, called the accumulator, to hold one operand & the result –No address is needed to specify the accumulator op codesource 2

6 6 Classification of instructions (continued…) A 0-address instruction uses a stack to hold both operands and the result. Operations are performed between the value on the top of the stack TOS) and the second value on the stack (SOS) and the result is stored on the TOS op code

7 7 Comparison of instruction formats As an example assume: that a single byte is used for the op code the size of the memory address space is 16 Mbytes a single addressable memory unit is a byte Size of operands is 24 bits Data bus size is 8 bits

8 8 Comparison of instruction formats (continued…) We will use the following two parameters to compare the five instruction formats mentioned before Code size  Has an effect on the storage requirements Number of memory accesses  Has an effect on execution time

9 9 4-address instruction Code size = 1+3+3+3+3 = 13 bytes No of bytes accessed from memory 13 bytes for instruction fetch + 6 bytes for source operand fetch + 3 bytes for storing destination operand Total = 22 bytes op codesource 2destinationnext addresssource 11 byte3 bytes

10 10 3-address instruction Code size = 1+3+3+3 = 10 bytes No of bytes accessed from memory 10 bytes for instruction fetch + 6 bytes for source operand fetch + 3 bytes for storing destination operand Total = 19 bytes 1 byte3 bytes op codesource 2destinationsource 1

11 11 2-address instruction Code size = 1+3+3 = 7 bytes No of bytes accessed from memory 7 bytes for instruction fetch + 6 bytes for source operand fetch + 3 bytes for storing destination operand Total = 16 bytes op codedestination source 1 source 21 byte3 bytes

12 12 1-address instruction Code size = 1+3= 4 bytes No of bytes accessed from memory 4 bytes for instruction fetch + 3 bytes for source operand fetch + 0 bytes for storing destination operand Total = 7 bytes 1 byte3 bytesop codesource 2

13 13 0-address instruction Code size = 1= 1 bytes # of bytes accessed from memory 1 bytes for instruction fetch + 6 bytes for source operand fetch + 3 bytes for storing destination operand Total = 10 bytes 1 byte op code

14 14 Summary

15 15 Example 2.1 text expression evaluation a = (b+c)*d - e


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