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Instruction Set Architectures Continued. Expanding Opcodes & Instructions.

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Presentation on theme: "Instruction Set Architectures Continued. Expanding Opcodes & Instructions."— Presentation transcript:

1 Instruction Set Architectures Continued

2 Expanding Opcodes & Instructions

3 Expanding vs Fixed Opcodes Fixed Size Opcode: – Every type of instruction uses same opcode size – MIPS instruction format:

4 Fixed Opcodes Expanding Opcode: – Different instructions = different length opcodes

5 Expanding Opcodes Expanding Opcode : – Special opcode means : keep reading xxx = any pattern but all 1's 1 1 1 1 1 1 1 1 X X X X 1 1 1 1 1 1 1 1 1 1 1 1 X X X X X X X X

6 Expanding Opcode Expanding Opcode : – More efficient use of space – Intel : 0F = keep reading : http://ref.x86asm.net/coder64.html http://ref.x86asm.net/coder64.html

7 Expanding Opcodes ARM Expanding / Split OpCode

8 Expanding Instructions Every instruction does not have to be the same size:

9 Expanding Instructions Might decode based on instruction

10 Expanding Instructions Might decode based on instruction – Java bytecode – bipush #immediate : +0 bipush +1 immediate +2 next instruction 7 8 9 10 11

11 Expanding Instructions Might decode based on instruction – 3 possibilities:

12 Expanding Instructions Intel – 32 bit code : 1-6 bytes – 64 bit code : up to 15 bytes:

13 Addressing Modes

14 Addressing Addressing : the ways we are allowed to refer to values and locations

15 Addressing Immediate Addressing: Value hard coded in instruction Immediate

16 Addressing Modes Direct Addressing : – Instruction contains the memory address to use

17 Addressing Register Indirect Addressing: A register contains the address of data

18 Addressing Modes Register Indirect Addressing : – Pointers:

19 Addressing Register Indirect With Offset Addressing: Start with address in register, add immediate offset

20 Addressing Register Indirect With Index (Variable Offset): Start with address in register, add offset amount from another register R2

21 Addressing PC Relative Addressing: Literal value is added to current PC value Immediate

22 Addressing Memory Indirect Addressing: Register holds address of memory where address is R

23 Addressing Memory Indirect Addressing: Register holds address of memory where address is R

24 Memory Indirect Uses Easy to jump to nth record of regularly sized structure:

25 Memory Indirect Addressing Irregular structure needs lookup table to store start addresses of each item: Array of Pointers

26 Memory Indirect Addressing Memory indirect allows access to list[2] in one instruction:

27 Other Uses Jump tables used for – Efficient switch statements enum operation {LOAD, STORE, ADD}; Switch (operation) { case LOAD: LOAD code; break: case STORE: STORE code; break: case ADD : ADD code; break: }

28 Other Uses Jump tables used for – Efficient switch statements – OOP Function Lookup

29 Special Tricks

30 ARM Addressing Tricks ARM Provides 3 Varients of offset addresses – Temporarily add offset – Add offset and store changed address – Add change after using current value

31 Atomic Read/Write Multiprocessor systems have to allow for atomic series of actions Special instructions check/set a memory value in one step

32 Loop Instructions Loops get run a lot Combine – Increment, compare and branch into one instruction

33 ARM Thumb Mode Thumb Mode – 16 bit instructions


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