1. Analog-Digital Conversion

2. Other types of ADC i. Dual Slope ADCs use a capacitor connected to a reference voltage. the capacitor voltage starts at zero and is charged for a set time by the output voltage of a sample-and-hold circuit. the capacitor is then switched to a known negative voltage reference, and charged in the opposite direction until it reaches zero volts again. this second charge is timed with a digital counter. The final count is proportional to the input voltage. Advantages: This technique is very precise and can produce ADCs with high resolution Disadvantages: very slow and generally more expensive than successive approximation ADCs.

3. Output from sample and hold circuit 1.When an analog value is applied, the capacitor begins to charge in a linear manner and the control logic passes to the counter 2.The counter continues to count until is reaches a pre-determined value. 3.Once the value is reached, the count stops and the counter is reset. The control logic switches the input to the first comparator to –V ref, providing a discharge path for the capacitor. 4.As the capacitor discharges the counter counts and V O1 reaches zero, the comparator o/p goes to zero, the count stops and the value is stored in the register V O1 1 Register Control Logic, (AND Gate)

4. 1.Fixed time, variable slope during charging 2.Variable time, fixed slope during discharging t t1t1 -V O1 DUAL SLOPE

5. The resolution of a n-bit analog-to-digital Converter (ADC) is a function of how many parts the maximum signal can be divided into. The formula to calculate resolution is 2 n. For example, a 12 bit ADC has a resolution of 2 12 = 4,096

6. Digital Signal Conditioning In many DSP applications, we must reconstruct an analog signal after the digital processing stage. This is done using a digital-to-analog converter (DAC), which is considerably less expensive than the ADC. DAC Digital ValueAnalog Voltage Reference Voltage

7. Types of DAC i. Voltage Source Multiplying DAC or Binary Weighted Input DAC This method use a reference voltage which is switched in or out by the digital data. The converter is so-named because it multiplies a certain gain value with a source voltage (V cc or sometime referred to as the reference voltage)

8. Let’s consider a 2 bit example MSB LSB DigitalAnalog 000 V 01 10 11 V cc 0.5V cc 1.5V cc

9. Take V R = 10 V Calculate the value of V out for the digital input of 1001 if R = 10 kΩ and R f = 5 kΩ EXAMPLE V out = -5.625 V

10. ii. R/2R DAC A disadvantage of the former DAC design was its requirement of several different precise input resistor values: one unique value per binary input bit. Manufacture may be simplified if there are fewer different resistor values to purchase, stock, and sort prior to assembly. By constructing a different kind of resistor network on the input of our summing circuit, we can achieve the same kind of binary weighting with only two kinds of resistor values, and with only a modest increase in resistor count. This “ladder” network looks like this: 3 bit R/2R DAC

11. I2I2 I1I1 I0I0 I TOTAL I in In order to calculate I in, must calculate R eq3

12. R eq3 = R I in = V ref / R eq3 = V ref / R I 2 = V ref / 2R I 1 = V ref / 4R I 0 = V ref / 8R

13. R= 15 kΩ 2R = 30 kΩ R F = 15 kΩ R eq3 = R = 15 kΩ I in = V ref / R eq3 = V ref / R = 5/15 = 0.333 mA I 2 = V ref / 2R = 5 / 30 = 0.1667 mA I 1 = V ref / 4R = 5 / 60 = 0.0833 mA I 0 = V ref / 8R = 5 / 120 = 0.04167 mA I T = 0.25 mA Vo = - I T x R f = -3.75 V

14. Input = (0101) 2 V REF = 10 V R = 2 kΩ R f = 4 kΩ Example: 4 bits R/2R DAC R eq4 = R = 2 kΩ I in = V ref / R eq4 = V ref / R = 10/2 = 5 mA I 3 = V ref / 2R = 10 / 4 = 2.5 mA I 2 = V ref / 4R = 10 / 8 = 1.25 mA I 1 = V ref / 8R = 10 / 16 = 0.625 mA I 0 = V ref / 16R = 10 / 32 = 0.3125 mA I T =1.5625 mA Vo = - I T x R f = - 6.25 V 0101 B3B2B1B0

15. Smoothing out the output of DAC The output of a DAC is stepped, just like the analog waveforms that were sampled and held. The stepped or staircase effect is a distortion, and it may be desirable to reduce this effect. Hence, at the end a low pass smoothing filter is used. This filter is referred to as a reconstruction filter.

16. An example of a reconstruction filter is the Sallen-Key filter circuit configuration Performance Specifications i. Resolution ii. Settling Time iii. Linearity

17. Better Resolution(3 bit) Poor Resolution(1 bit) Vout Desired Analog signal Approximate output 2 V Levels Digital Input 0 0 1 Vout Desired Analog signal Approximate output 8 V Levels 000 001 010 011 100 101 110 111 110 101 100 011 010 001 000 RESOLUTION

18. 18 Settling Time: The time required for the input signal voltage to settle to the expected output voltage(within +/- V LSB ). Any change in the input state will not be reflected in the output state immediately. There is a time lag, between the two events. SETTLING TIME

19. Linearity: is the difference between the desired analog output and the actual output over the full range of expected values. Ideally, a DAC should produce a linear relationship between a digital input and the analog output, this is not always the case. LINEARITY

20. 20 Linearity(Ideal Case) Digital Input Perfect Agreement Desired/Approximate Output Analog Output Voltage NON-Linearity(Real World) Analog Output Voltage Digital Input Desired Output Miss-alignment Approximate output