1. S. Bota – Calorimeter Electronics overview - July 2002 Status of SPD electronics Very Front End Review of ASIC runs What’s new: RUN 4 and 5 Next Actions

2. S. Bota – Calorimeter Electronics overview - July 2002 SPD VFE ASIC Architecture

3. S. Bota – Calorimeter Electronics overview - July 2002 Review of ASIC runs RUN1 (Sep 2000) –Test separate blocs –1 full channel RUN2 (June 2001 – test beam) –4 full channels –test ECL vs CMOS output RUN 3 (Jan 2002) New tunnable subtractor 1 full channel with digital control On-chip DAC to program thresholds RUN 4 (May 2002) TESTED Under TEST In FAB

4. S. Bota – Calorimeter Electronics overview - July 2002 Features 0.8  m AMS BiCMOS Technology Processing speed 40 MHz Analog Processing + Digital Control Dual channel Fully differential SEU and SEL protection for digital logic Triple voting (custom output stage in FF) Guard rings Power consumption < 2 W / 64 channels Signal range. 0 to 5 MIP Electronics resolution 5% of 1 MIP Dynamic range: 40 dB (7 bits)

5. S. Bota – Calorimeter Electronics overview - July 2002 Run 2 Sept 2001 4 full channels test ECL vs CMOS output Pile-Up compensation fixed at 17%

6. S. Bota – Calorimeter Electronics overview - July 2002 Run 2: Experimental Results (I) Offset (Output Zero Error) Gain Gain T reset T reset Noise Noise Output range Output range Linearity error + 38.6 mV  io = 70 mV r.m.s. 16.51 (for a typical input pulse)  io = 0.091 r.m.s. 5.5 ns (for 1 V output) about 1 mV r.m.s >  1V for an arbitrary input signal < 0.5 % full scale

7. S. Bota – Calorimeter Electronics overview - July 2002 Run 2: Experimental Results (II) Discriminator internal signals for a typ. pulse Interleaved operation of the 2 subchannels

8. S. Bota – Calorimeter Electronics overview - July 2002 Run 3 January 2002 1 full channel with digital control New tunnable subtractor On-chip Digital to Analog Converter to program thresholds

9. S. Bota – Calorimeter Electronics overview - July 2002 Run 3 DAC transfer function 3 different ref voltages 7 bits pseudo -differential DAC 1b for sign 6b for modulus R-2R architecture INL 3 different ref voltages

10. S. Bota – Calorimeter Electronics overview - July 2002 PMT DC current problem Solution 1.Build a new base supporting 100 uA 2.Reduce PMT gain (100 fC / MIP). 1.Increase PMT load Resistor (150   400  ) 2.Increase ASIC gain (factor 3) 3.Decrease threshold for 1 MIP by a factor 2. PMT supports only 100 uA DC (18 uA with present base) SPD at hottest point (10 % occupancy) 64 channels * 1pC / MIP * 0.1 / 25 ns = 250 uA

11. S. Bota – Calorimeter Electronics overview - July 2002 RUN 4 Sent 24-05-2002 Complete processing channel with digital control. Separate analog blocks + digital ctrl Works at 3.3 V to reduce power consumption. All blocks have been resdesigned at transistor level The previous power consumption per chip was 1.2 W, now it will be around 600 mW. Higher gain (x3) to meet PMT DC current limit requirements. A fully differential preamplifier is added before the integration stage. Towards final prototype Will be tested Sep-Oct 2002

12. S. Bota – Calorimeter Electronics overview - July 2002

13. Front End Amplifier Differential input. common mode interference is cancelled Offset compensation is possible using external resistors. High Bandwidth (> 200MHz). Low gain (  6). Low impedance output (independent integration switch). Layout optimised for matching: input transistors and resistors and current sources. 2-3 mV r.m.s. (calculated and simulated) 1 mV r.m.s. (calculated and measured) Noise (output) (random + pick-up) 5 MIP – 10 MIP (linearity ??) 5 MIP (1 V)Range (output) 100 mV200 mV1 MIP signal (output) FEA + integratorIntegratorInput stage RUN4RUN2/3 Offset (output) 70 mV r.m.s. (15 samples) ??

14. S. Bota – Calorimeter Electronics overview - July 2002 Front End Amplifier

15. S. Bota – Calorimeter Electronics overview - July 2002 Modified Track & Hold GUGGENB TRANSCONDUCTOR OUTPUT STAGE Differential Signal IntegComp DAC TRANSCONDUCTOR 0 <  < 1/2

16. S. Bota – Calorimeter Electronics overview - July 2002 GUGGENB TRANSCONDUCTOR OUTPUT STAGE IntegComp DAC TRANSCO NDUCTOR

17. S. Bota – Calorimeter Electronics overview - July 2002

23. poly2

24. S. Bota – Calorimeter Electronics overview - July 2002

25. RUN 5 Design Completed Area: 30 mm2 8 full channels + digital ctrl Works at 3.3 V to reduce power consumption Higher gain to meet PMT current limit requirements.