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Aum Amriteswaryai Namah:. PIN DIAGRAM WW hen two processors are to communicate, more often the communication is organized in a bit serial fashion The.

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Presentation on theme: "Aum Amriteswaryai Namah:. PIN DIAGRAM WW hen two processors are to communicate, more often the communication is organized in a bit serial fashion The."— Presentation transcript:

1 Aum Amriteswaryai Namah:

2 PIN DIAGRAM WW hen two processors are to communicate, more often the communication is organized in a bit serial fashion The communication may be ss implex transmission hh alf duplex ff ull duplex Asynchronous Communication Connection for simplex serial transmission between two  Cs

3 The two processors should communicate bit streams at a prearranged bit rate called ‘baud rate’ Baud rate represents the number of bits per second at which the transmission and reception between the two processors take place Consider the implementation of a scheme at 9.6 K baud. It implies transmission at 9600 bits per sec each bit takes 104.25μs for transmission both the  Cs will have a clock of 104.25μs time period; it is called the ‘baud rate generator’;

4 Asynchronous transmission of a byte at 9.6 kbaud

5 Connection for half duplex serial transmission between two  Cs

6 Connection for full duplex serial transmission between two  Cs

7 Synchronous Communication Connection for synchronous half duplex transmission between two  Cs Connection for synchronous full duplex transmission between two  Cs

8 Four  Cs connected for communication amongst them in half duplex asynchronous mode ProcessorAddress A01h B02h C03h D04h Address assignments to different  Cs in Figure

9 USART and Overheads ‘‘ Universal Synchronous Asynchronous Receiver Transmitter (USART)’ – a module which carries out the serial communication The simplest USART will have the following features. AA baud rate generator. PP arallel to Serial Converter: II nsertion of additional bits: DD ata recovery at Receiver: PP rogrammability: BB it checks: BB uffers: II nterrupts: EE rror Indication:

10 The PIC16 series have an USART built in with a transmitter block and a receiver block within Baud Rate Generator The number X is to be loaded into SPBRG register The baud rate is derived from the processor clock by dividing it by a selected byte – X – in the 0 to 255 range. In synchronous mode In asynchronous mode or

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12 SPEN

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16 Nine-Bit Transmission TT x9 [TXSTA<b6>] and RX9 [RCSTA<b6>] are to be set to select the 9 bit scheme. Can be used for two purposes 1. As address/data indication bit WW hen the master sends out bytes, the first one can be the address. BB it – b8 – can be set indicating that the associated byte is an address. AA ll slaves sense b8; if b8 = 1, they check for an address match; each can accept further bytes only if it finds an address match. 2. As Parity bit

17 Now..,try this out!!!!!! ? Calculate the baud rate error for the following conditions: FOSC = 16 MHz Desired Baud Rate = 9600 BRGH = 0 SYNC = 0

18 Solution


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