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A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M.

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Presentation on theme: "A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M."— Presentation transcript:

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2 A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. Coppola@, A. Buller*, X. Song, M. Md. Mozammel Huq Azad Khan&, S. Yanushkevich^, V.Shmerko^, M. Chrzanowska-Jeske Portland State University, Portland, Oregon 97207-0751 #Technical University o f Eindhoven, Eindhoven, The Netherlands, + Technical University of Warsaw, Warsaw, Poland, @ Cypress Semiconductor Northwest and Oregon Graduate Institute, Oregon, USA, * Information Sciences Division, Advanced Telecommunications Research Institute International (ATR), Kyoto, Japan, & Department of Computer Science and Engineering, East West University, Bangladesh,, ^ Technical University of Szczecin, Szczecin, Poland Year 2001

3 Atom-scale computation: What are the difficulties in trying to build a classical computing machine on such a small scale? One of the biggest problems with the program of miniaturizing conventional computers is the difficulty of dissipated heat. by heat dissipation.As early as 1961 Landauer studied the physical limitations placed on computation by heat dissipation.

4 Plot showing the number of dopant impurities involved in logic with bipolar transistors with year. –(Copyright 1988 by International Business Machines Corporation, reprinted with permission.) R. W. Keyes, IBM J. Res. Develop. 32, 24 (1988). Computing at the atomic scale: a survey made by Keyes in 1988

5 Information loss = energy loss The loss of information is associated with laws of physics requiring that one bit of information lost dissipates k T ln 2 of energy, where k is Boltzmann’ constant and T is the temperature of the system. Interest in reversible computation arises from the desire to reduce heat dissipation, thereby allowing: –higher densities –speed R. Landauer, R. Landauer, “Fundamental Physical Limitations of the Computational Process”, Ann. N.Y. Acad.Sci, 426, 162(1985).

6 When will IT happen? 2010 2020 2001 k T ln 2 Power for switching one bit Logarithmic scale Related to information loss Assuming Moore Law works In our lifetime

7 Reversible Logic Bennett showed that for power not be dissipated in the circuit it is necessary that arbitrary circuit can be build from reversible gates.

8 Information is Physical Is a minimum amount of energy required per computation step? Rolf Landauer, 1970. Whenever we use a logically irreversible gate we dissipate energy into the environment. ABAB A  B ABAB A A  B reversible

9 Information is Physical Charles Bennett, 1973: There are no unavoidable energy consumption requirements per step in a computer. Power dissipation of reversible circuit, under ideal physical circumstances, is zero. Tomasso Toffoli, 1980: There exists a reversible gate which could play a role of a universal gate for reversible circuits. ABCABC A Reversible and universal B C  AB

10 Reversible computation: Landauer/Bennett: almost all operations required in computation could be performed in a reversible manner, thus dissipating no heat! The first condition for any deterministic device to be reversible is that its input and output be uniquely retrievable from each other. –This is called logical reversibility. The second condition: a device can actually run backwards then it is called physically reversible – and the second law of thermodynamics guarantees that it dissipates no heat. Billiard Ball Model

11 Reversible logic Reversible are circuits (gates) that have one- to-one mapping between vectors of inputs and outputs; thus the vector of input states can be always reconstructed from the vector of output states. 000 001 010 011 100 101 110 111 INPUTS OUTPUTS 2 42 4 3  6 4  2 5  3 6  5 (2,4)(365)

12 Reversible logic and Reversible are circuits (gates) that have the same number of inputs and outputs and have one-to- one mapping between vectors of inputs and outputs; thus the vector of input states can be always reconstructed from the vector of output states. 000 001 010 011 100 101 110 111 INPUTS OUTPUTS Feedback not allowed Fan-out not allowed 2 42 4 3  6 4  2 5  3 6  5 (2,4)(365)

13 Reversible logic constraints Feedback not allowed in combinational part Fan-out not allowed In some papers allowed under certain conditions In some papers allowed in a limited way in a “near reversible” circuit

14 To understand reversible logic, it is useful to have intuitive feeling of various models of its realization.

15 Conservative Reversible Gates

16 Definitions A gate with k inputs and k outputs is called a k*k gate. A conservative circuit preserves the number of logic values in all combinations. In balanced binary logic the circuit has half of minterms with value 1.

17 Billiard Ball Model DEFLECTION SHIFT DELAY This is described in E. Fredkin and T. Toffoli, “Conservative Logic”, Int. J.Theor. Phys. 21,219 (1982).

18 Billiard Ball Model (BBM) Inputoutput A B1 2 3 4 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 1 0 0 1 A and B A B B and NOT A A and NOT B This is called interaction gate conservative This illustrates principle of conservation (of the number of balls, or energy) in conservative logic.

19 Interaction gate Inputoutput A B z1 z2 z3 z4 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 1 0 0 1 Z1= A and B A B Z4 = A and B Z2 = B and NOT A Z3 = A and NOT B A B Z1= A and B Z2 = B and NOT A Z3 = A and NOT B Z4 = A and B

20 Inverse Interaction gate outputinput A B z1 z2 z3 z4 0 0 0 0 1 0 0 0 1 0 0 1 0 1 0 1 0 0 1 1 1 Z1= A and B A B Z4 = A and B Z2 = B and NOT A Z3 = A and NOT B Other input combinations not allowed z1 z3 z2 z4 A B Designing with this types of gates is difficult

21 Billiard Ball Model (BBM) Inputoutput A B z1 z2 z3 0 0 0 0 0 0 1 1 0 0 1 0 0 0 1 1 1 0 1 1 1 A B 2 3 Z1 = NOT A * B Z2 = A * B Z3 = A switch

22 Priese Switch Gate Inputoutput A B z1 z2 z3 0 0 0 0 0 0 1 1 0 0 1 0 0 0 1 1 1 0 1 1 1 A B 2 3 Z1 = NOT A * B Z2 = A * B Z3 = A A B

23 Inverse Priese Switch Gate outputinput A B z1 z2 z3 0 0 0 0 0 1 0 0 0 1 0 0 1 1 0 0 1 1 1 1 z1 A B z2 z3 Z3 Z1 A B Z2

24 Inverter and Copier Gates from Priese Gate Z1 = NOT A * 1 garbage A 1 V2 = B * 1 V3 = B B 1 Garbage outputs shown in green Inverter realized with two garbages Copier realized with one garbage Input constants

25 The 2*2 Feynman gate, called also controled-not or quantum XOR realizes functions P = A, Q = A  B, where operator  denotes EXOR.. When A = 0 then Q = B, when A = 1 then Q =  B. Every linear reversible function can be built by composing only 2*2 Feynman gates and inverters fan-out gate.Copying gateWith B=0 Feynman gate is used as a fan-out gate. (Copying gate) Feynman Gate + AB P Q

26 Feynman Gate from Priese Z1 = NOT A * B Z2 = A * B Z3 = A A B V1 = NOT B * A V2 = B * A V3 = B B A B ABAB Fan-out > 1 Garbage Garbage outputs Z2 and V2 shown in green

27 Fredkin Gate reversible and quantum computing –Fredkin Gate is a fundamental concept in reversible and quantum computing. –Every Boolean function can be build from 3 * 3 Fredkin gates: P = A, Q = if A then C else B, R = if A then B else C.

28 Notation for Fredkin Gates A 0101 CB PQR A 01 P BC QR A circuit from two multiplexers Its schemata This is a reversible gate, one of many C AC’+B BC’+AC C A B

29 Operation of the Fredkin gate A0BA0B AB1AB1 A01A01 CABCAB C AC’+B BC’+AC A AB A A+B A A A’ 0AB0AB 1AB1AB CABCAB 1BA1BA

30 A 4-input Fredkin gate X A B CX A B C 0A B C0A B C A B 01A B 01 1A B C1A B C X AX’+CX BX’+AX CX’+BX 0A B C0A B C 1C A B1C A B A A+B AB A’

31 Optical Conservative Reversible and Nearly Reversible Gates

32 Integrated optics Integrated optics offers a particularly interesting candidate for implementing parallel, reversible computing structures These structures operate in closer correspondence with the underlying microphysical laws which presume non- dissipative interactions and global interconnections.

33 Reversible, Conservative, Optical Computers Zero energy can be dissipated internally Dissipation in such circuits would arise only in reading the output, which amounts for clearing the computer for further use. Total decoupling of computational and thermal modes. Decoupling is achieved by: – reversing the computation after the results have been computed, –restoring the circuit to its initial configuration

34 Requirements for gates No distinction can be made between the inputs. Each must be of the same type (in this case optical) and at the same level The unrestricted type of gate permits a significant reduction in circuit’s complexity. The circuit must be both optically reversible and information-theory (logic) reversible.

35 The device An optical four-state nonlinear interface switching configuration is derived from the symmetry of an information-losless three-port structure The device is: – bit-conservative –optically reversible –logically reversible –with dissipation related to the Kramers-Kronig inverse of the index of refraction

36 The device The device inherently possesses three-terminal characteristics: –insensitivity to line-noise fluctuations (maintains high contrast between transmitted and reflected beams) –cascadability through bit conservation, –fan-out by pumped transparentization, –free-space optical fan-in, –pumped (total internal) reflected inversion. Planar lattice-regularized layouts for binary adders

37 The Dual Beam Nonlinear interface with polarized signal beams of intensity I 0 incident at glancing angle  0 or I 0  2I 0 or 0 n 2 = n 10 -  n L + n 2NL (I) I 0 or 0 n 1 = n 10 n 2 = n 10 -  n L + n 2 NL (I 0 ) 90 o   inc  sin -1 (n 10 -  n L + n 2 NL (I 0 ) )/ n 10

38 Fig. 3. Signal replication circuits consisting of an RNI and a half-wave plate. Note that: –P or Q is the degraded signal –P and Q is the restored signal RNI = Reversible Non-linear Interface Pv.Qh PQv.PQh PQ’v.P’Qh

39 Fig. 3. Signal replication circuits consisting of an RNI and a half-wave plate. Note that: –P or Q is the degraded signal –P and Q is the restored signal PQv.PQh Pv.Qh PQ’v.P’Qh /2 1 h P v P h Pv Pv Pv P h 1 v Q h Qh Qh Q v QvQhQvQh RNI Half-wave plate

40 Interaction gate implemented with a Fabry-Perot cavity n = n 0 + n 2NL (I) Q P PQ PQ’ P’Q

41 Interaction Gate A B AB A’B AB’ AB A B A’B AB’ AB In this gate the input signals are routed to one of two output ports depending on the values of A and B Interaction Gate Inverse interaction Gate

42 Minimal Full Adder using Interaction Gates C AB A’B AB’ AB A B A’B AB’ AB Carry 0 Sum A  B Garbage signals shown in green 3 garbage bits

43 Reversible logic: Garbage A k*k circuit without constants on inputs which includes only reversible gates realizes on all outputs only balanced functions, therefore it can realize non-balanced functions only with garbage outputs.

44 Priese Switch Gate In this gate the input signal P is routed to one of two output ports depending on the value of control signal C Priese Switch Inverse Priese Switch P C CP C’P C P C CP C’P C

45 Minimal Full Adder Using Priese Switch Gates A B AB A’B B carry C sum Garbage signals shown in green 7 garbage bits

46 Minimal Full Adder Using Fredkin Gates In this gate the input signals P and Q are routed to the same or exchanged output ports depending on the value of control signal C C A B carry 1 0 sum 3 garbage bits

47 RNI Half-Adder v h horizontal polarization mirror Vertical polarization mirror v h v v,h h v h

48 Ah Bv ABv + ABh A’Bv + AB’h Ah Bv ABv A’Bv AB’h ABh One Beam with Two polarizations Logical versus physical realization of signal in optics

49 v RNI Half- Adder h h v v Ah Bv Sum = (A’B+A’B)h Bv(A’B+A’B)h Removes v 1h AB’h Carry = ABh ABv AB’h A’Bv A’Bh A’Bv ABv + ABh A’Bv + AB’h A’Bv 1h We created similar lattice structures for optical realizations of symmetric, threshold, unate and other circuits

50 Fredkin Gate In this gate the input signals P and Q are routed to the same or exchanged output ports depending on the value of control signal C Fredkin Gate Inverse Fredkin Gate P C CP+C’Q C’P+CQ C Q P C CP+C’Q C’P+CQ C Q

51 Fredkin Gate from Priese Switch Gates Q C P C  CP+CQ CP+  CQ CP  CP CQ  CQ

52 Operation of a circuit from Priese Switches Q=0 C P=1 C=1  CP+CQ CP+  CQ CP  CP CQ  CQ Red signals are value 1 Two red on inputs and outputs One red on inputs and outputs Conservative property

53 Fredkin Gate from Interaction Gates P Q C C CP+  CQ  CP+ CQ

54 Concluding on the Billiard Ball Model The interaction and Priebe gates are reversible and conservative, but have various numbers of inputs and outputs Their inverse gates required to be given only some input combinations From now on, we will assume the same number of inputs and outputs in gates. INVERTER, FREDKIN and FEYNMAN gates can be created from Billiard Ball Model. Billiard Ball ModelThere is a close link of Billiard Ball Model and Optical gates and other physical models on micro level Many ways to realize universal optical gates, completely or partially reversible but conservative

55 Quantum versus reversible computing Quantum ComputingQuantum Computing is a coming revolution – after recent demonstrations of quantum computers, there is no doubt about this fact. They are reversible. Top world universities, companies and government institutions are in a race. Reversible computingReversible computing is the step-by-step way of scaling current computer technologies and is the path to future computing technologies, which all happen to use reversible logic. –DNA –biomolecular –quantum dot –NMR –nano-switches power consumptionIn addition, Reversible Computing will become mandatory because of the necessity to decrease power consumption

56 What to remember? 1.Importance of reversible logic 2.Importance of conservative logic 3.Billiard Ball model of computing. 4.Gates of Billiard Ball model. 5.Are they all reversible in traditional sense? – different type of reversibility? 6.Priese or Switch gate. 7.Interaction gate 8.Realization of reversible gates in Billiard Ball model. 9.Optical realization of reversible gates.


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