Presentation is loading. Please wait.

Presentation is loading. Please wait.

April 25, 2011. A Constructive Group Theory based Algorithm for Reversible Logic Synthesis.

Similar presentations


Presentation on theme: "April 25, 2011. A Constructive Group Theory based Algorithm for Reversible Logic Synthesis."— Presentation transcript:

1 April 25, 2011

2 A Constructive Group Theory based Algorithm for Reversible Logic Synthesis

3 Main Ideas 1.We know many representations of reversible circuits, such as reversible vectors, truth tables, Kmaps and permutative unitary matrices. 2.In this lecture we will learn one more useful representation – a set of cycles. 3.A cycle can be decomposed to transpositions. Set of transpositions is another representation. 4.This is the initial paper in “group-theory approach to quantum circuits synthesis”

4 Background Reversible logic plays an important role in quantum computing; –oracles are reversible (permutative) circuits. Any computing system of irreversible logic gates leads inevitably to energy dissipation. To avoid power dissipation, circuits must be constructed from reversible gates. –De Vos – CMOS –Optical –DNA –Nano-technologies There are a lot of research on the construction of reversible logic gates and circuits: –De Vos 1998, group theory. –Kerntopf 2000, enumerative – decision diagrams. –Perkowski et al. 2001, exor logic, spectral, group theory, heuristic, genetic algorithm, exhaustive. –Markov et al 2002, exhaustive, group theory. –Yang et al, 2003 – group theory approach – GAP and exhaustive search –Miller, Dueck and Maslov 2003, spectral and heuristic non-optimal algorithm –Aggrawal and Jha 2004, heuristic RM-transformation-based.

5 Definition 1 (Binary reversible gate): Let B = {0, 1}. fA binary logic circuit f with n inputs and outputs is denoted by a binary multiple-output function f : B n  B n. Let  B 1,…, B n   B n and  P 1,…, P n   B n be the input and output vectors, –where B 1,…, B n are input variables – and P 1,…, P n are output variables. There are 2 n different assignments for the input vectors. A binary logic circuit f is reversible if it is a one-to-one and onto function (bijection). A binary reversible logic circuit with n inputs and n outputs is also called an n-qubit binary reversible gate. There are a total of (2 n )! different n-qubit binary reversible circuits.

6 Permutations, Cycles and Transpositions

7 Permutation groups and their relationship with reversible circuits M = {d 1, d 2,, d k }.Definition 2 (Permutation): Let M = {d 1, d 2,, d k }. A bijection of M onto itself is called a permutation on M. MThe set of all permutations on M forms a group under composition of mappings, called a symmetric group on M. S k.It is denoted by S k. A permutation group is simply a subgroup of a symmetric group.

8 A mapping s : M  M can be written as: d 1, d 2,.., d k d i1, d i2,.., d i1 (1) Here we use a product of disjoint cycles (Definition 3) as an alternative notation for a mapping. For example, d 1, d 2, d 3., d 4, d 5, d 6, d 7, d 8, d 9 d1, d 4, d 7, d 2,d 5, d 8, d 3, d 6, d 9 (2) can be written as (d 2, d 4 ) (d 3, d 7 ) (d 6, d 8 ). ( ( ( ( Mappings and cycles

9 Identity minterm F(a 14 ) = a 14 F(1101) = 1101 F(13) = 13 0123456701234567 0123456701234567 Identity function as a mapping Identity function as a circuit

10 0123456701234567 0123456701234567 Toffoli gate as a mapping Toffoli gate as a circuit Simple function Simple function has many identity minterms, N is small The function is a single 2- cycle (6,7)

11 0123456701234567 0123456701234567 Identity function as a mapping Identity function as a circuit Simple function Simple function has no identity minterms The function has four 2-cycles (0,1), (2,3), (4,5) and (6,7) N is high but function is simple

12 0123456701234567 0123456701234567 Problem to be solved has simple formulation 0123456701234567 0123456701234567 0123456701234567 0123456701234567 It is a kind of “Rubik Cube” game Feynman Fredkin Toffoli

13 Patterns based on transpositions and costs based on transpositions

14 0123456701234567 0123456701234567 Distance Histogram of a function 0123456701234567 0123456701234567 0 1 2 3 How many minterms in distance k cycle Distance k cycle 0 1 2 3 How many minterms in distane k cycle Distance k cycle 6 8

15 Notation Denote “( )” as the identity mapping (i.e., direct wiring) and call this the unity element in a permutation group. A product f * g of two permutations applies mapping f before g.

16 Cascading gates and permutations A n-qubit reversible circuit is a permutation in S 2 n, and vice versa. Cascading two gates is equivalent to multiplying two permutations in S 2 n. Thus, in what follows, we will not distinguish a n-qubit reversible circuit from a permutation in S 2 n.

17 Definition 3 (‘j’-cycle): Let S k be a symmetric group of symbols {d 1, d 2,…,d k }, then (d i1, d i2,…, d ij ) is called a ‘j’-cycle, –where j  k, 1  i 1, i 2,…, i j  k. 0123456701234567 0123456701234567 Cycle (0,1,2,3)

18 Realizations of the same cycle 00 0 1 11 10 Cost 1+2=3 00 0 1 11 10 Cost 1+1=2 (0,1,2) = (0,1) * (0,2) 012012 (0,1,2) = (0,2) * (1,2) 012012 We should select the set of 2-cycles with the minimum total distance This is better

19 Definition 4 (NOT gate):Definition 4 (NOT gate): A NOT gate Nj connects an inverter to the j-th wire, i.e.: P j = B j  1, P i = B i, if i  j. 1  j  n: An example NOT gate is shown in figure 1.

20 Definition 5 Definition 5 (‘n-1’-CNOT gate): C jA ‘n-1’-Controlled-NOT (CNOT) gate C j is defined as follows: If m  j, then P m = C j (B m ) = B m. If m = j, and B i = 1 for all i  j, then P j = C j (B j ) = B j  1; else, P j = B j. An example ‘4’-CNOT gate is shown in figure 2. A ‘n-1’-CNOT gate is a generalized Toffoli gate where two inputs control an output of another input. These are “big Toffoli gates” that we want to avoid in general

21 MMD and New methods 1.MMD is a specific algorithm that processes permutation vectors (truth table) in such a way that the set of self-mapping minterms grows from top. 2.This can be rewritten to our new notation. 3.But this is only one way of realizing permutation from transpositions. 4.We should investigate more of them.

22 0123456701234567 0123456701234567 MMD method 0123456701234567 0123456701234567 We add identity minterms from top Our idea here is to decompose to 2-cycles of the minimum total distance MMD method can start from function with small N and make it a new function with big N

23 0123456701234567 0123456701234567 Distance 3 function – Miller 0123456701234567 0123456701234567 0 1 2 3 How many minterms in distane k cycle Distance k cycle 6 0123456701234567 0123456701234567 Distance 1 function – Toffoli Distance 2 function – Fredkin

24 Programs for reversible logic MMDS GreedyDistance Template Function (permutation) with high N Function with small N Decompose to smallest distance gates Reduce N This can be greedy or evolutionary algorithm Perform local optimization to reduce costs of gates Perform heuristic search with one ordering MMD Perform heuristic search with many orderings

25 III. THEORETICAL RESULTS on decomposing to cycles The process to constructively synthesize any ‘n’-qubit reversible circuit by Not and ‘n-1’- CNOT gates without ancilla qubits. Lemma 1: Every permutation can be decomposed to some ‘2’-cycles. 2-cycle = transposition

26 Remark 1:Remark 1: This lemma is a well-known result in group theory Definition 6Definition 6 (neighboring ‘2’-cycle): us (u, s)If two n-dimension vectors u, s have only one bit difference, we call the permutation (u, s) a neighboring ‘2’-cycle. Hamming Distance one Transpositions or “Neighboring 2- cycles”

27 Realizations of the same cycle 00 0 1 11 10 Cost 1+2=3 00 0 1 11 10 Cost 1+1=2 (0,1,2) = (0,1) * (0,2) 012012 (0,1,2) = (0,2) * (1,2) 012012 We should select the set of 2-cycles with the minimum total distance This is better

28 Lemma 2: usSuppose between u and s, there is only one bit B j different, and i same bits are zeros. These zero bits are B i1,…, B il. Then, (u, s) = N i1 * … * N il * C j * N il * … * N i1 (4) This is a distance 1 decomposition of a 2-cycle

29 Lemma 3: Decomposition to distance-1 transpositions u, s If two n-dimension vectors u, s have k bits different, then there is an ordered set M = {d 1, d 2,.., d k+1 } such that d 1 = u, d k+1 = s and for any i, 1  i < k + 1, there is only one bit difference between d i and d i+1, and (u, s) = (d 1, d 2 )(d 2, d 3 ) … (d k, d k+1 ) (d k, d k-1 ) … (d 2, d 1 ) (5) This is a decomposition of a 2-cycle to 1- distance cycles. Total distance cost should be minimized

30 Decomposing to sequences of neighbor minterms in transpositionsDecomposing to sequences of neighbor minterms in transpositions In order to make the number of NOT gates as small as possible, we give two rules for constructing the ordered set M.In order to make the number of NOT gates as small as possible, we give two rules for constructing the ordered set M. If the number of 1’s in the vector u is more than that in s, If the number of 1’s in the vector u is more than that in s, then d 1 = u, d k+1 = s. Else, d 1 = s, d k+1 = u. then d 1 = u, d k+1 = s. Else, d 1 = s, d k+1 = u. In the different bits between u and s, change the zero bit to one first, then change one bit to zero bit.In the different bits between u and s, change the zero bit to one first, then change one bit to zero bit. For example, if u = (0, 1, 0, 0, 0 ), s = (0, 0, 1, 1, 1),For example, if u = (0, 1, 0, 0, 0 ), s = (0, 0, 1, 1, 1), then k = 4; d 1 = s, d 5 = u and, d 2, d 3, d 4 are given in the following table. then k = 4; d 1 = s, d 5 = u and, d 2, d 3, d 4 are given in the following table.

31 Various Distance 3 gates 00 0 1 11 10 When F(a) = b, (or (a,b) is a 2- cycle) Hamming distance of a and b is 3 All Distance 1 gates 00 01 11 10 0 1 When F(a) = b, Hamming distance of a and b is 1 Hamming Distance and “Distance-Gates”

32 REMOVAL OF NOT gates can remove a pair of the adjacent NOT gates in the same quantum wire. Lemma 4: (complexity of NOT gates)Lemma 4: (complexity of NOT gates) (u, s) then the number of NOT gates is no more thanIn decomposing ‘2’-cycle (u, s) to NOT gates and ‘n-1’-CNOT gates, suppose there are j bits different between u and s, and there are j 0 zero bits in these bits in d 1 and j 1 one bits in these bits in d1, where j 0  j 1, then the number of NOT gates is no more than 2(j - 2) + 2(j 0 - 1) if j 0  1, or 2(j-1) if j 0 = 0.

33 Theorem 1: N  2 nFor a given n-qubit reversible circuit f, if there are N distinct input patterns that are different from their corresponding outputs, where N  2 n, and the other (2 n - N) input patterns are the same as their outputs, then this circuit can be synthesized by at most 2 n * N ‘(n - 1)’- CNOT gates and 4n 2 * N NOT gates without ancilla qubit.

34 Theorem 2: All n-qubit reversible circuits can be constructed by: less than 2n * 2 n NOT gates and less than (2n - 1) * 2 n ‘n - 1’-CNOT gates without ancilla qubit.

35 ALGORITHM Step 1. Check the truth table of f to determine before using equation 3 and lemma 3, whether we need NOT gates or not. Step 2. After step 1, write the reversible circuit in a product of cycles form. (d 1, d 2,…, d k ),r i d i d i+1, i = 1, 2,…, kd k+1 = d 1For every cycle (d 1, d 2,…, d k ), calculate the number r i of different bits between d i and d i+1, i = 1, 2,…, k where d k+1 = d 1. r jLet r j be the maximal number. The basic idea to decompose the reversible circuit by equation 3 is to break the mapping relation from d j to d j+1 without increasing the number of different bits between adjacent vectors. (d 1, d 2,…, d k ) = (d j, d j+1 ) (d j, d j+2, d j+3,…, d 1 ) (6)(d 1, d 2,…, d k ) = (d j, d j+1 ) (d j, d j+2, d j+3,…, d 1 ) (6)

36 Recursively repeating this process, we decompose the reversible circuit to ‘2’- cycles. Step 3. Decompose every ‘2’-cycles by NOT and ‘n- 1’-CNOT gates by Lemma 3, two rules in remark 2, lemma 2, and remove pairs of adjacent NOT gates when possible. ALGORITHM (cont)

37 COMPLETE SYNTHESIS EXAMPLE WITH NON-MINIMIZED TOFFOLI GATES

38 Table II.Given a binary reversible circuit f which has a truth table as shown in Table II. Therefore, f = (a 1, a 3, a 4, a 16 ) (a 2, a 6, a 14 ). Step 1. The total number of changed vectors is 7, less than 2 4-1 = 8, thus, we deal with the input reversible circuit f without pre- cascading NOT gates. Step 2. Decompose each cycle into the product of 2-cycles by using equation 6. SYNTHESIS EXAMPLE

39 (a 1,a 3,a 4,a 16 )(a 2,a 6,a 14 ) (a 6,a 14 ) (a 6,a 2 )(a 4,a 16 ) (a 4,a 3 ) (a 1, a 3 ) d1 d2d1 a 4 =1100 a 16 =1111 d2 a 4 =1100 a 3 =0100 d1 a 6 =1010 a 14 =1011 d1 a 6 =1010 a 2 =1000 d1 inverters N 2 * N 2 = ()

40 C3C3

41 The synthesis process is finished, and f is decomposed into the product of 12 NOT gates and 7 ‘n- 1’-CNOT gates, shown in figure 3. C3C3 N3N3 C4C4 (a 6,a 14 ) (a 6,a 2 )(a 4,a 16 ) (a 4,a 3 ) (a 1, a 3 ) d1 d2d1

42 IMPROVED SYNTHESIS METHOD BASED ON “DISTANCE GATE”

43 a 4 =1101 a 16 =1110 d2 New idea = a better way to implement transpositions (13,14) a b c d a b c d Realization of transposition (1101, 1110) = (13,14) HD =2

44 d2 New idea = a better way to implement transpositions (12,15) a b c d c d 0 0 1 1 1 a b c d c d 1 1 0 0 0 Realization of transposition (1100, 1111) = (12,15) HD =2 a 4 =1100 a 16 =1111 d2 a b c d

45 a 4 =1100 a 16 =1111 d2 New idea = a better way to implement transpositions (12,15) a b c d a b c d c d 0 1 1 1 1 a b c d c d 1 0 0 0 0 0 1 HD =2 Realization of transposition (1100, 1111) = (12,15) 1 1 1 1

46 a 4 =1100 a 16 =1101 d2 New idea = a better way to implement transpositions (12,11) a b c d a b c d c d 0 0 0 0 0 1 11 1 0 1 a b c d c d 0 1 0 1 0 1 10 1 1 1 0 1 1100  1100 no change 1101  1101 no change Realization of transposition (1001, 1110) = (9,14) HD =2

47 a 4 =1001 a 16 =1110 d2 New idea = a better way to implement transpositions a b c d a b c d c d 1 0 1 0 1 0 00 1 0 1 a b c d c d 0 1 0 1 0 1 01 1 1 1 1 0 1010  1010 1001  1110 0 1 1 Realization of transposition (1001, 1110) = (9,14) HD =2 Here we see the transposition in action

48 Distance gates 1.The gates shown in last few slides are called “Distance gates”. 2.They are all inexpensive and realize transpositions. 3.By adding inverters on inputs and outputs of these gates a wider category (called family) of these gates is created. 4.We should consider the widest family and find synthesis methods (algorithms) for them.

49 CONCLUSIONS CONCLUSIONS The concept of decomposition of permutation to cycles The concept of decomposition of cycle to 2-cycles The concept of distance-k-gates and decomposition with smallest total distance A constructive algorithm for synthesizing reversible circuits by NOT and ‘n-1’-CNOT gates Synthesis examples based on this algorithm, which show that even by hand, synthesizing any ‘4’-qubit reversible circuit is not difficult. Especially for functions with small N. The computational complexity of our synthesis algorithm is exponentially lower than the complexity of breadth-first search based synthesis algorithm. To be used as part of a comprehensive system of programs

50 CONCLUSIONS CONCLUSIONS 1.Knowledge reduces search – group theory 2.Knowledge is not sufficient to find minimal solution – search is necessary 3.Role for evolutionary algorithms, PSO, immune, etc 4.We found some heuristics, more are needed. 5.Based on last section, the method can be improved, which is a good project.

51 What to remember? 1.Permutation vectors, versus sets of cycles. 2.How to decompose cycles to transpositions? 3.The best decomposition to transpositions. 4.Old method of decomposition and its realization. 5.New proposed method of decomposition to transpositions 6.Realization of a “distance gate” for a transposition. 7.Useful theorems of group theory, their use in synthesis. 8.How to compose transpositions?


Download ppt "April 25, 2011. A Constructive Group Theory based Algorithm for Reversible Logic Synthesis."

Similar presentations


Ads by Google