1. Introduction to Experiment 7 Replacing Hardwired Control Unit with the Picoblaze Microcontroller ECE 448 Spring 2009

2. 2ECE 448 – FPGA and ASIC Design with VHDL Sources P. Chu, FPGA Prototyping by VHDL Examples Chapter 14, Picoblaze Overview Chapter 15, Picoblaze Assembly Code Development Chapter 16, Picoblaze I/O Interface Chapter 17, Picoblaze Interrupt Interface

3. SSD1 SSD2 LED JOYSTICK PRNG_STATU S PRNG_CTRL OUTPUT_INTERFACE INPUT_INTERFACE PRNG ADDR_DECODER DATA RAM PICOBLAZE INSTRUCTION RAM MEM_BANK DO[7..0] DI[7..0] out_port A[8..0] DO[0] A[8] port_id A[7..0] instructionaddress addr A[7..0] RA[7..0] din read_strobe write_strobe dout io mem rng io, mem, rng SSD1_en, SSD2_en LED_en, MEM_BANK_en, PRNG_CTRL_en, RAM_wen, RAM_ren we re RAM_wen RAM_ren in_port interrupt interrupt_ack Two 7-segment displays 8 LEDs joystick A[8..0] RD[7..0] R_wen rinit

4. 000 001 002... 0FE 0FF 100 101 102 103 104 105... 1FE 1FF 255 x 8 DATA RAM MEM_BANK JOYSTICK SSD1 SSD2 LED PRNG_STATUS PRNG_CTRL MEM_BANK MEM_BANK: 7 6 5 4 3 2 1 0 A8 A8 – current memory bank number = the most significant bit of the address JOYSTICK: 7 6 5 4 3 2 1 0 A A – joystick active (bit cleared by reading register JOYSTICK or by interrupt_ack), RLDUS R, L, D, U, S – joystick right, left, down, up, select PRNG_STATUS: 7 6 5 4 3 2 1 0 D D – done: bit cleared by writing to register PRNG_CTRL, set after PRNG generates 255 8-bit numbers, PRNG_CTRL: 7 6 5 4 3 2 1 0 I I – initialize: after 1 is written to this bit, PRNG generates 255 8-bit numbers, and the corresponding address (index) of each number

5. Task 1 – Browsing Mode 00 01 02 03 04 05 …. FA FB FC FD FE 00 01 02 03 04 05 …. FA FB FC FD FE AddressData Current Address Two 7-Segment Displays (in hexadecimal notation) Joystick up = Increment Address Joystick down = Decrement Address 8 LEDs (in binary notation) Value at Current Address 255x8 RAM

6. Task 2 – Edit Mode 00 01 02 03 04 05 …. FA FB FC FD FE 00 01 02 03 04 05=>06 …. FA FB FC FD FE AddressData Current Address Two 7-Segment Displays (in hexadecimal notation) Joystick up = Increment Address Joystick down = Decrement Address 8 LEDs (in binary notation) Value at Current Address 255x8 RAM Joystick Enter = Edit Joystick up = Increment Data Joystick down = Decrement Data Joystick Enter = Approve

7. Task 3 – Initialize 00 01 02 03 04 05 …. FA FB FC FD FE 25 87 94 26 B5 C6 …. 7A 5B 34 43 89 AddressData Joystick Enter = Initialize with Pseudorandom Values 255x8 RAM

8. 8-bit LFSR (Linear Feedback Shift Register) with the period of 2 8 -1 8 R R0R0 R1R1 R2R2 R3R3 R4R4 R5R5 R6R6 R7R7 = D flip-flop with set or reset determining its initial value after “soft” reset Run for 8 clock cycles before using a new output value.

9. Task 4 – Sorting 00 01 02 03 04 05 …. FA FB FC FD FE 25 37 44 56 57 78 …. B4 B6 B8 CC D4 AddressData Joystick Enter = sorting using one of the following types sorting signed numbers in the descending order sorting signed numbers in the ascending order sorting unsigned numbers in the descending order sorting unsigned numbers in the ascending order Joystick Up changing sorting type 255x8 RAM

10. Task 5 – Advanced Testbench Processes Generating Input Stimuli Design Under Test (DUT) Process Comparing Actual Outputs vs. Expected Outputs Design Correct/Incorrect Yes/No Testvector file(s)

11. Task 5 – Format of an input file number of entries to be sorted (in decimal) empty line numbers to be sorted in the initial order (in the hexadecimal notation, one number per line) empty line numbers after sorting (in the hexadecimal notation, one number per line) 6 B4 89 A3 58 61 78 58 61 78 89 A3 B4

12. Task 6 : Comparing Circuits from Experiment 6 and Experiment 7 (hardwired vs. Picoblaze-based controller) in terms of minimum number of clock cycles necessary to complete sorting minimum clock period resource utilization.

13. Introduction to Picoblaze Development Environment (Hands-on Session)