1. A Comparison of FET Devices: FinFETs vs. Traditional CMOS
Walive Pathiranage Manula Randhika Pathirana,
Matthew Ridder,
and Luis Lopez Ruiz
University of Virginia,
Dept. of Electrical Engineering
Dec 11, 2015

2. MOSFET and FinFET Structure
CMOS: Shorter channel, less resistance, larger leakage
2D structure
Conducting channel only on the surface.
As the channel decreases, the control over the device is reduced.
3D structure
Conducting channel on 3 sides.
Very little leakage.
High potential for large improvements in power

3. Related Work 22 and 45nm technology comparisons for 6T SRAM cells
Power reduction and faster performance
Reference:
Katrina Aspmo, Torunn Berg, and Grethe Wibetoe, “Atmospheric Mercury Depletion Events (AMDEs) in Polar Regions During Arctic Spring,” presentation (Oslo, Norway: University of Oslo, 16 June 2004).

4. Our Project
16nm technology

5. Setup

6. NAND

7. NAND Results
CMOS
FinFET

8. NOR

9. NOR Results
CMOS
FinFET

10. XOR

11. XOR Results
16nm CMOS
16nm finFET

12. Flip Flop

13. Flip Flop Results
CMOS
FinFET

14. 4-bit Adder

15. 4-bit Adder Results
CMOS

16. 4-bit Adder Results
FinFET

17. MUX
MUX 4to1 Schematic

18. MUX
MUX 4to1 Testbench

19. MUX Results
16nm CMOS Technology – Transient Analysis

20. MUX Results
16nm finFET Technology – Transient Analysis

21. MUX Results
Delay and Power Measurements Comparisson

22. Conclusions and Future Work
FinFET devices show a high improvement over traditional CMOS in terms of both delay and leakage.
XOR: finFET 11x faster and 8x less leakage.
MUX: finFET 12x faster and 10x less leakage
NAND:FinFET 8x faster and 3x less leakage
Adder:FinFET 14x faster and 4x less leakage
Next steps would be to obtain access to layout and do area analysis and comparison between technologies by including parasitic effect
Despite the improvements shown, there are challenges to fully adopt this new technology: resources for modeling and designing, fabrication, cost, etc.