1. ECE291 Computer Engineering II Lecture 3 Josh Potts University of Illinois at Urbana- Champaign

2. January 23, 2001 ECE291 Outline Programming with registers Instruction components and format Addressing modes Sampling of addressing modes

3. January 23, 2001 ECE291 Programming Model Registers Note: 32 bit registers are not available on 8086, 8088, 80286

4. January 23, 2001 ECE291 Programming with Registers General-Purpose Registers AX (accumulator) often holds the temporary result after an arithmetic or logic operation (also addressed as EAX, AH, or AL) BX (base) often holds the base (offset) address of data located in the memory (also addressed as EBX, BH, BL) CX (count) contains the count for certain instructions such as shift count (CL) for shifts and a counter (CX or ECX) with the LOOP instruction (also addressed as ECX, CH, or CL) DX (data) holds –the most significant part of the product after a 16- or 32-bit multiplication, –the most significant part of the dividend before a division, and –I/O port number for a various I/O instructions (also addressed as EDX, DH, DL)

5. January 23, 2001 ECE291 Programming with Registers Pointer and Index Registers SP (stack pointer) used to address data in a LIFO (last-in, first-out) stack memory, most often used when –the PUSH and POP instructions are executed –a subroutine is CALLed or RETurned within a program BP (base pointer) often used to address an array of data in the stack memory SI (source index) used to address source data indirectly for use with the string instructions DI (destination index) normally used to address destination data indirectly for use with the string instructions IP (instruction pointer) always used to address the next instruction executed by the microprocessor

6. January 23, 2001 ECE291 Programming with Registers Flag Register Flags indicate the condition of the microprocessor as well as its operation The flag bits change after many arithmetic and logic instructions execute Example flags, –C(carry) indicates carry after addition or a borrow after subtraction –O(overflow) is a condition that can occur when signed numbers are added or subtracted –Z(zero) indicates that the result of an arithmetic or logic operation is zero –T(trap) when the trap flag is set, it enables trapping through the on- chip debugging feature

7. January 23, 2001 ECE291 Programming with Registers Segment Registers CS(code) defines the starting address of the section of memory holding code (programs and procedures used by programs) DS(data) a section of memory that contains most data used by a program ES(extra) an additional data segment SS(stack) defines the area of memory used for the stack. –the location of the current entry point in the stack segment is determined by the stack pointer register. –the BP register addresses data within the stack segment FS and GS available on 80386 and 80486 allow two additional memory segments for access by programs

8. January 23, 2001 ECE291 Machine Language Machine language is the native binary code that the microprocessor understands and uses as the instructions that control its operation Interpretation of machine’s language allows debugging or modification at the machine language level Microprocessor requires an assembler program, which generates machine code –the machine language instructions are generally too complex to generate by hand (but we’ll ask you to do it on exams anyway) Machine language instructions for the 8086-80486 vary in length from 1 to as many as 13 bytes –there are over 20000 variations of machine language instructions

9. January 23, 2001 ECE291 Machine Language (cont.) Real mode uses 16-bit instructions –This means that instructions use 16-bit offset addresses and 16-bit registers –This does not mean the instructions are 16-bits in length Protected mode can use 16 or 32 bit instructions –The D bit in the descriptor (within a look-up table of descriptors) indicates how the 80386/80486 instructions access register and memory data in the protected mode –D = 0, the 80386/80486 assumes 16 bit instructions –D = 1, the 80386/80486 assumes 32 bit instructions –the 32-bit instruction mode assumes all offset addresses are 32 bits as well as all registers

10. January 23, 2001 ECE291 Addressing Modes Register - transfers a byte or word from the source register to the destination register MOV BX, CX Immediate - transfers an immediate byte or word of data into the destination register or memory location MOV AX, 3456h Direct - moves a byte or word between a memory location specified in the instruction and a register MOVAL, [1234h] ( 1234h is treated as a displacement within data segment)

11. January 23, 2001 ECE291 Addressing Modes(cont.) Register Indirect (base relative or indexed) - transfers a byte or word of data between a register and the memory location addressed by an index (DI or SI) or base register (BP or BX) MOVAX, [BX] Base Plus Index (base relative indexed) - transfers a byte or word of data between a register and the memory location addressed by a base register (BP or BX) plus index (DI or SI) register MOV DX, [BX + DI]

12. January 23, 2001 ECE291 Addressing Modes(cont.) Register Relative - transfers a byte or word of data between a register and the memory location addressed by an index (DI or SI) or base register (BP or BX) plus displacement MOVAX, [BX + 1000h] Base Relative Plus Index (base relative indexed) - transfers a byte or word of data between a register and the memory location addressed by a base register (BP or BX) plus an index register (DI or SI) MOVAX, [BX + SI + 100h]

13. January 23, 2001 ECE291 Instruction Components and Format Instruction Components OpcodeModeDisplacement Data/ Immediate value

14. January 23, 2001 ECE291 Addressing Modes(cont.) Each instruction can only access memory once –MOV VAR1,VAR2 is invalid! –MOV AX,VAR2 followed by MOV VAR1,AX is ok. For 2-operand instructions, size of operands must match –Compare 8-bit number to 8-bit number –Compare 16-bit number to 16-bit number –CMP AH,AX is invalid! Destination operand (usually the first) must be a register or memory –MOV 1234,AX is invalid! Mode byte encodes which registers the instruction uses

15. January 23, 2001 ECE291 Sampling of Addressing Modes

16. January 23, 2001 ECE291 Sampling of Addressing Modes

17. January 23, 2001 ECE291 Sampling of Addressing Modes

18. January 23, 2001 ECE291 Instruction Components The OPCODE byte contains the opcode, as well as direction (D) and data size (W) bits The MODE byte only exists in instructions that use registers The MODE byte encodes the target and source for 2-operand instructions The target and source are specified in the REG and R/M fields DW OPCODE OpcodeModeDisplacement Data/ Immediate value MODREGR/M

19. January 23, 2001 ECE291 Instruction Components OPCODE Opcode (one or two bytes) selects the operation (e.g., addition, subtraction, move) performed by the microprocessor DW OPCODE D - direction of the data flow D = 0 data flow to R/M field from REG field D = 1 data flow to the REG field from R/M in the next byte of the instruction W - data size W = 0 data size is a byte W = 1 data size is a word/double word

20. January 23, 2001 ECE291 Instruction Components MODE There are three components of the MODE byte MOD field specifies the addressing mode for the selected instruction and whether the displacement is present with the specified addressing mode If the MOD field contains a 00, 01, or 10, the R/M field selects one of the memory-addressing modes, e.g., –MOV AL, [DI](no displacement) –MOV AL, [DI + 2](8-bit displacement) MODREGR/M MOD FUNCTION 00no displacement 018-bit sign-extended displacement 1016-bit displacement 11R/M is a register (register addressing mode)

21. January 23, 2001 ECE291 Instruction Components REG & R/M Register Assignment Register assignment for the REG and R/M fields CodeW = 0 (Byte)W = 1(Word)W =1 (Double Word) 000ALAXEAX 001CLCXECX 010DLDXEDX 011BLBXEBX 100AHSPESP 101CHBPEBP 110DHSIESI 111BHDIEDI

22. January 23, 2001 ECE291 Register Assignment Example Consider 2 byte instruction 8BECh in a machine language program (assuming 16-bit instruction mode) binary representation: 1000 1011 1110 1100, from this we have OPCODE:100010=> MOV D = W 1=> a word moves into the register specified in the REG field MOD11=>R/M field indicates register REG101=>indicates register BP R/M100=>indicates register SP consequently the instruction is: MOV BP, SP

23. January 23, 2001 ECE291 Use of R/M Field in Determining Addressing Mode If the MOD field contains a 00, 01, or 10, the R/M field takes on a new meaning Examples: 1.if MOD = 00 and R/M = 101 the addressing mode is [DI] 2.if MOD = 01 or 10 and R/M = 101 the addressing mode is [DI + 33h] or [DI + 2222H], where 33h, 2222h are arbitrary values for displacement CodeFunction 000DS:[BX+SI] 001DS:[BX+DI] 010SS:[BP+SI] 011SS:[BP+DI] 100DS:[SI] 101DS:[DI] 110SS:[BP] 111DS:[BX] Base plus Index Register indirect MOD FUNCTION 00no displacement 018-bit sign-extended displacement 1016-bit displacement 11R/M is a register (register addressing mode)

24. January 23, 2001 ECE291 Example Consider machine language instruction 8A15h binary representation is: 1000 1010 0001 0101 OPCODE:100010=> MOV D 1=> a word moves into the register specified in the REG field W0=>byte MOD00=>memory with no displacement REG010=>indicates register DL R/M101=>indicates addressing mode [DI] the instruction is: MOV DL, [DI]

25. January 23, 2001 ECE291 Direct Addressing Mode Direct Addressing mode (for 16-bit instructions) occurs whenever memory is referenced by only a displacement MOV [1000h], DL moves the contents of DL into data segment memory location 1000h MOV [NUMB], DL moves the contents of DL into symbolic data segment memory location NUMB 10100000111000001000000000000000 OPCODE D W MOD REG R/M Displacement-low Displacement-high Byte 1Byte 2 0 Byte 3Byte 4 MOV [1000h], DL Whenever the instruction has only a displacement: MOD is always 00 R/M is always 110

26. January 23, 2001 ECE291 Immediate Instruction Consider an instruction: MOV word [BX + 1000h], 1234h 1100011101110001 1000000000000000 OPCODE W MOD R/M Displacement-low Displacement-high Byte 1Byte 2 1010000000101100 Data-low Data-high Byte 3Byte 4 Byte 5Byte 6 Moves 1234h into the word-sized memory location addressed by the sum of 1000h, BX, and DS x 10h WORD directive indicates to the assembler that the instruction uses a word-sized memory pointer (if the instruction moves a byte of immediate data, then BYTE directive is used). The above directives are only needed when it is not clear if the operation is a byte or a word, e.g., MOV [BX], AL clear a byte move MOV [BX], 1 not clear, can be byte-, word, or double word-sized move should be for instance MOV BYTE [BX], 1 CodeFunction 000DS:[BX+SI] 001DS:[BX+DI] 010SS:[BP+SI] 011SS:[BP+DI] 100DS:[SI] 101DS:[DI] 110SS:[BP] 111DS:[BX] Base plus Index Register indirect

27. January 23, 2001 ECE291 Segment MOV Instructions The contents of a segment register are moved by MOV, PUSH, POP Segment registers are selected by appropriate setting of register bits (REG field) CodeSegment Register 000 ES 001 CS 010 SS 011 DS 100 FS 101 GS Note: MOV CS, ?? and POP CS are not allowed Example: MOV BX, CS 10100100 00111011 OPCODE MOD REG R/M REG is 001 => selects CS R/M is 011 => selects BX Note that the OPCODE for this instruction is different from the prior MOV instructions