1. Lect 3: Instruction Set and Addressing Modes

2. 386 Instruction Set (3.4) –Basic Instruction Set : 8086/8088 instruction set –Extended Instruction Set : 80286; several new instructions and additional addressing modes –80386 specific instruction set: Basic Instruction Set Basic + Extended Instruction Set Basic + Extended+ 80386 specific Instruction Set System control Instruction set System control Instruction set 8086/8088 80286 80386 Protected Mode Real Mode

3. 386 Instruction Set (3.4) Addressing Modes of 386DX (3.5) –Addressing Modes: a method of specifying an operand Operands : in REG, Memory, I/O ports, and within Instruction –* Control Transfer : direct, indirect addressing –the modes available register addressing : REG immediate addressing: within Instruction direct addressing register indirect addressing based addressing indexed addressing based indexed addressing MEM or I/O

4. Addressing Modes –Register Operand Addressing Mode can be accessed in byte, word, or double word sizes. MOV AX, BX Byte: AL, AH, BL, BH, CL, CH, DL, DH Word: AX, BX, CX, DX, SP, BP, SI, DI, CS, DS, SS, ES, FS, GS Double Word: EAX, EBX, ECX, EDX, ESP, EBP, ESI, EDI See Fig 3.8 in page 64 –Immediate Operand Addressing an operand is part of the instruction MOVAL, 15H 8 bits, 16 bits, and 32 bits in length See Fig 3.10 in page 67

5. ABCD Register Addressing 0000 IP CS DS SS ES FS GS AX BX CX DX SP BP SI DI Address Memory Content Instruction 80386 MPU 0100 XXXX ABCD 01000 8B MOV AX, BX 01001 C3 01002 XX

6. Immediate Addressing 0000 IP CS DS SS ES FS GS AX BX CX DX SP BP SI DI Address Memory Content Instruction 80386 MPU 0100 01000 B0 MOV AL, 15H 01001 15 01002 XX XX 15

7. Direct Addressing 16-bit Memory Operand Addressing Modes –16-bit addressing modes and 32-bit addressing modes –Physical address = Segment Base: EA(effective address) Segment Base Address(SBA) : the starting location of the segment EA : the offset of the operand from the beginning of the segment of memory EA = Base + Index + Displacement Base = BX or BP, Index = SI or DI, displacement = 8-bit or 16-bit

8. 16-bit Memory Operand Addressing –Direct Addressing Mode PA = Segment Base : Direct Address MOV CX, [1234H] IP CS DS SS ES FS GS AX BX CX DX SP BP SI DI 01000 01001 01002 01003 01004 8B 0E 34 12 XX 0000 0100 0200 XXXX 03234 ED 03235 BE BEED

9. 16-bit Memory Operand Addressing –Register Indirect Addressing Mode PA = Segment Base : Indirect Address {BX,BP,SI,DI} example : MOVAX, [SI] MOV AX,[SI] IP CS DS SS ES FS GS AX BX CX DX SP BP SI DI 01000 01001 01002 01003 01004 8B 04 XX 0000 0100 0200 XXXX 03234 ED 03235 BE BEED 1234

10. 16-bit Memory Operand Addressing Based Addressing Mode –PA = Segment Base : {BX or BP} + {8-bit or 16-bit displacement} –Base register : the beginning of a data structure (See Fig 3.16 (b) in page 74 –Example: MOV [BX]+1234H, AL MOV [BX]+1234H, AL IP CS DS SS ES FS GS AX BX CX DX SP BP SI DI 01000 01001 01002 01003 01004 88 07 34 12 XX 0000 0100 0200 04234 04235 1234 ED 1000 Displacement Base Register + Element 0 Element 1 Data Structure Element n-1

11. 16-bit Memory Operand Addressing –Indexed Addressing Mode PA = Segment Base : {SI, DI}+{8-bit or 16-bit displacement} Displacement : the starting address of an array; Index: selects the specific element in the array Example: MOVAL, [SI]+2000H Index Register Displacement + Element 0 Element 1 Array of data Element n-1 IP CS DS SS ES FS GS AX BX CX DX SP BP SI DI 01000 01001 01002 01003 01004 8A 44 34 12 XX 0000 0100 0200 05234 05235 2000 XX 1000 MOV AL, [SI]+1234H BE

12. 16-bit Memory Operand Addressing –Based-Indexed Addressing Mode PA= Seg Base: {BX, BP}+{SI,DI}+{8-bit or 16-bit displacement} to access complex data structures See fig 3.20 in page 80 Example: MOVAH, [BX][SI]+1234H opcode : 8A 44 34 12

13. 32-bit Memory Operand Addressing Modes –Enhanced in two ways Scale factor : EA = base + (index x scale factor) + displacement PA = Segment Base: EA

14. –See fig 3.23 in page 83: change 16-bit displacement to 32-bit displacement –How can we specify the 32-bit extension modes? Default (D) bit in the code segment descriptor 2 prefixes to the instruction set Operand size prefix Address size prefix 32-bit Memory Operand Addressing Modes