1. The development of the readout ASIC for the pair-monitor with SOI technology ~irradiation test~ Yutaro Sato Tohoku Univ. 29 th Mar. 2010  Introduction  Pair-monitor  SOI technology  Prototype ASIC  Design  Irradiation test

2. Pair-monitor is a silicon pixel detector to measure the beam profile at IP. The distribution of the pair B.G. is used. –The same charges with respect to the oncoming beam are scattered with large angle. –The scattered particles have information on beam shape. The location will be in front of the BeamCal.Pair-monitor 1 LumiCal Pair-monitor IP BeamCal Distributions of pair B.G. Y [cm] X [cm] (nominal) e + beame - beam e+e+ e+e+ e-e- e-e-

3. The pair-monitor is developed using the SOI technology. SOI (Silicon On Insulator) pixel detector SOI pixel group at KEK is currently developing. The sensor and electronics are integrated in the SOI substrate.  Monolithic device  High speed  Low power  Thin device  Low material This prototype is not monolithic (Substrate is not a sensor). Development of Pair-monitor with SOI technology 2 The prototype ASIC for the pair-monitor was fabricated via the MPW Run organized by the SOI pixel group. Electronics BOX Substrate →Sensor

4. Requirement to readout ASIC Required performance 1.Time resolution : < 260 nsec (less than bunch space) 2.Noise level : < 1000 e (typical signal level : 15,000 e) 3.Radiation tolerance : > a few Mrad/year 4.Time-dependent measurement –Measure the pixel hit count in 16 time slice per train, and hit counts are read out during the inter-train gap of 200 ms. → The prototype readout ASIC was designed to satisfy these requirements. 3 …………… … 1 ms 200 ms [[[ 12 16 1 train = 2625 bunch ~~~~ Beam structure

5. Process : FD-SOI CMOS 0.20 μm Chip size : 2.5 x 2.5 mm 2 # of pixels : 9 (3x3) Pixel size : 390 x 350 μm 2 Each cell has different detector capacitance. Prototype readout ASIC 4 Readout pixel Layout of prototype ASIC ComparatorAmp. Input Offset voltage trimming circuit Analogue circuit 8 bit counter Count-register 16 Count-register 2 Count-register 1 … Output Digital circuit

6. Irradiation test Irradiation test was performed to test the radiation tolerance and observe the radiation effect. X-ray generator : Rigaku FR-D –Target : Cu (~ 8 keV) Doses : up to 2 Mrad –#photons was evaluated by the pin-diode. –All the photons are assumed to be absorbed within an attenuation length (λ ~ 66 μm). –Silicon density : d = 2.33 g/cm 3 5 Rigaku FR-D @KEK PF

7. Radiation effect There are two types of radiation effect. Single event effect (SEE) Caused by single energetic particle. → SOI device is known as rad-hard for SEE. Total dose effect (TDE) Caused by charge trapped in the oxide layer. → Oxide trapped charge could be compensated by the substrate voltage. 6 + + + + + + + + + + V SUB = -1.65V(design) ~40 nm 200 nm ~260 μm + + + + + substrate BOX Gate Source Drain Performed measurements Signal shape at pre-amp. Gain Linearity Noise level

8. The signal shape at the pre-amp. was compared. By irradiation, the signal shape becomes smaller. The transistor was shorted due to large 1 Mrad irradiation, however similarly the signal shape can be returned by V SUB. Signal shape 7 The signal shape of post-irradiation can be returned to that of pre-irradiation by V SUB compensation. Pre-irrad. (V sub = -1.65 V) Post-irrad. (total 300 krad) 1 μs 10 mV V SUB compensation Output from pre-amp. (V sub = -1.65 V) (V sub = -4.72 V) Irrad. Test pulse timing

9. The threshold scan was performed and the gain was compared. By the irradiation, the gain becomes smaller.Gain 8 The gain can be restored by V SUB compensation. Doses [krad] Gain [μV/e] Pre-Irrad. w/ V SUB compensation w/o V SUB compensation

10. The threshold scan was performed and the linearity was compared. (fitting region : 7,000 ~ 45,000 e) By the irradiation, the linearity becomes worse. Maximum residual [%] Doses [krad] w/o V SUB compensation w/ V SUB compensation Pre-Irrad.Linearity 9 The linearity can be restored by V SUB compensation. Residual × × × × Output voltage Input charge V min V max ΔV Fit line

11. The noise level was compared. By irradiation, the noise level becomes bigger. Noise level 10 Pre-Irrad. Post-Irrad. (100krad) Post-Irrad. (300krad) Post-Irrad. (2Mrad) The noise level returns to that at pre-irrad. by the V SUB compensation. Detector capacitance [pF] Noise [e] V SUB compensation The radiation tolerance up to 2 Mrad was confirmed and oxide trapped charge was compensated by V SUB. ※ Dashed line means w/ V SUB compensation.

12. Summary The development of the pair-monitor with SOI technology was started. The first prototype which is only readout ASIC was produced and the irradiation test were performed successfully.  The radiation tolerance up to 2 Mrad was confirmed.  The oxide trapped charge was compensated by the substrate voltage. Irradiation test (γ-ray or electron beam) Production of the monolithic prototype 11Plan

13. Backup

14. The operation test was performed. Test system GNV-250 module was used for the operation and readout. –KEK-VME 6U module The test-sequence by GPIO is controlled by a PC. Test system 13 Hit count Operation signals Register switching GPIOTest-board Readout ASIC FIFO FPGA PC Hit count

15. Operation test was performed successfully. Operation test 14 Detector capacitance [pF] Noise [e] TSpice Sim. Exp.(negative) Exp.(positive) Noise level # of input TP Readout hit count @4 MHz/pixel No bit lost! Time resolution & Time-dep. measurement Requirement Prototype meets the requirement of time resolution, time-dependent measurement and noise level.

16. Threshold scan was performed. Fit to error function (S-curve) Threshold : 6.886 ± 0.009 [mV] Noise : 0.7152 ± 0.0128 [mV] The gain was estimated to convert the noise into equivalent noise electrons. Gain : 16.94 [mV/fC] Threshold scan 15 Noise Threshold Error function Count efficiency Threshold voltage [mV] Slope → gain Injected charge [fC] Threshold [mV] Noise : ~260 electrons (Injected charge 5.88 [fC])

17. Radiation doses 16 3.7 Mrad/year 1 st layer of the BeamCal Pair-monitor Doses [Mrad/year] layer

18. Radiation doses Total Doses = (#photon) × (Doses per a photon) The number of photons Evaluated by the photoelectron of diode. – k = 2.5 x 10 9 [photon/μA] Doses per a photon Energy of photon : 8.19 keV –Weighted average of Kα (8.04 keV) and Kβ (8.91 keV) –All the photons are assumed to be absorbed within an attenuation length (λ ~ 66 μm) Silicon density d = 2.33 g/cm 3 17

19. Radiation doses 18 Doses [krad] Time [day]

20. Substrate voltage (V sub ) 19 Substrate voltage V sub [V] Doses [krad] Design value (-1.65V)

21. Threshold scan 20 Threshold voltage [mV] Input charge [10 3 e] Pre-Irrad. Post Irrad. (100 krad) Post Irrad. (300 krad) Post Irrad. (2 Mrad)

22. Residual 21 Post Irrad. (100 krad) Pre-Irrad. Input charge [10 3 e] Post Irrad. (300 krad) Post Irrad. (2 Mrad)