1. 1 GTK-WG Meeting, CERN, Apr 1st 2014, A. Cotta Ramusino for INFN and Dip. Fisica FE “off-detector” readout electronics for the Gigatracker: status update Angelo Cotta Ramusino

2. 2 “off-detector” readout electronics for the Gigatracker (GTKRO): status update  preparing for the test of interconnection to the TDCpix: high speed serial data link  preparing for the test of interconnection to the TDCpix: configuration link  GTKRO motherboard production GTK-WG Meeting, CERN, Apr 1st 2014, A. Cotta Ramusino for INFN and Dip. Fisica FE

3. 3 “off-detector” readout electronics for the Gigatracker (GTKRO): status update  preparing for the test of interconnection to the TDCpix: high speed serial data link  preparing for the test of interconnection to the TDCpix: configuration link  GTKRO motherboard production GTK-WG Meeting, CERN, Apr 1st 2014, A. Cotta Ramusino for INFN and Dip. Fisica FE The GTKRO high speed serial data receivers have been so far tested by generating 3.2Gbps serial streams on board and looping them back, as during the Nov 2013 dry run. real GTKRO signals recorded via SignalTap, a.c.r., 2013-11-29

4. 4 “off-detector” readout electronics for the Gigatracker (GTKRO): status update  preparing for the test of interconnection to the TDCpix: high speed serial data link  preparing for the test of interconnection to the TDCpix: configuration link  GTKRO motherboard production GTK-WG Meeting, CERN, Apr 1st 2014, A. Cotta Ramusino for INFN and Dip. Fisica FE The simulated data pattern matches the pattern (idle characters) published by Matt. Stricter check could be done by testing the GTKRO against an up-to-date model of the TDCpix serializer. a.c.r.2014-03-19 GTKRO simulation of 3.2Gbps signals TDCpix 3.2Gbps output signals (from “The TDCPix Test System and First Results”, Matt Noy, Feb 11 2014

5. 5 “off-detector” readout electronics for the Gigatracker (GTKRO): status update  preparing for the test of interconnection to the TDCpix: high speed serial data link  preparing for the test of interconnection to the TDCpix: configuration link  GTKRO motherboard production GTK-WG Meeting, CERN, Apr 1st 2014, A. Cotta Ramusino for INFN and Dip. Fisica FE real GTKRO signals recorded via SignalTap, a.c.r., 2013-11-27 Acknowledgement of the ‘t’ character reception from the Ethernet port ‘t’ character received from the GTKRO slow link controller after the about 2.6us turnaround time The GTKRO serial configuration link has been so far tested by hosting in the GTKRO FPGA both the slow link controller and a simulated TDCpix-side endpoint. The loopback through the installed fibers has been tested during the Nov 2013 dry run.

6. 6 “off-detector” readout electronics for the Gigatracker (GTKRO): status update  preparing for the test of interconnection to the TDCpix: high speed serial data link  preparing for the test of interconnection to the TDCpix: configuration link  GTKRO motherboard production GTK-WG Meeting, CERN, Apr 1st 2014, A. Cotta Ramusino for INFN and Dip. Fisica FE The GTKRO controller has been checked against Matt’s up-to-date model of the TDCpix configuration link controller. The simulation results shows that the two system properly exchange data. a.c.r. 2014-03-28

7. 7 “off-detector” readout electronics for the Gigatracker (GTKRO): status update  preparing for the test of interconnection to the TDCpix: high speed serial data link  preparing for the test of interconnection to the TDCpix: configuration link  GTKRO motherboard production GTK-WG Meeting, CERN, Apr 1st 2014, A. Cotta Ramusino for INFN and Dip. Fisica FE The higher level of the TDCpix configuration protocol could be handled locally by the on board NIOS processor which has access to: on-board SRAM 1M x 18bit for local configuration variable storage (SRAM interface module developed by R.Malaguti, INFN-FE) FIFO based interface to the “hardware” layer of the TDCpix configuration protocol Stefano’s ethernet MAC I2C link (firmware developed by R. Malaguti, INFN-FE) to on board sensors (XCVR link input optical power; FPGA temperature)

8. 8 “off-detector” readout electronics for the Gigatracker (GTKRO): status update  preparing for the test of interconnection to the TDCpix: high speed serial data link  preparing for the test of interconnection to the TDCpix: configuration link  GTKRO motherboard production GTK-WG Meeting, CERN, Apr 1st 2014, A. Cotta Ramusino for INFN and Dip. Fisica FE Following the meeting the preparation of the actual interconnection link will be discussed with the TDCpix designers

9. 9 “off-detector” readout electronics for the Gigatracker (GTKRO): status update  preparing for the test of interconnection to the TDCpix: high speed serial data link  preparing for the test of interconnection to the TDCpix: configuration link  GTKRO motherboard production GTK-WG Meeting, CERN, Apr 1st 2014, A. Cotta Ramusino for INFN and Dip. Fisica FE All GTKRO motherboard PCBs have been manufactured and a first lot of 15 is being populated; delivery expected in a week.