1. Biasing
Biasing: Application of dc voltages to establish a fixed level of current and voltage.
BJT Biasing Circuits:
Fixed Bias Circuit
Fixed Bias with Emitter Resistor Circuit
Voltage-Divider Bias Circuit
Feedback Bias Circuit

2. Fixed Bias Circuit This is a Common Emitter (CE) configuration.
Solve the circuit using KVL.
1st step: Locate capacitors
and replace them with an
open circuit
2nd step: Locate 2 main loops
which are
BE loop
CE loop

3. Fixed Biased Circuit
1st step: Locate capacitors and replace them with an open circuit

4. 2nd step: Locate 2 main loops.
Fixed Biased Circuit
2nd step: Locate 2 main loops.
BE Loop
CE Loop 1 2 1 2

5. Fixed Biased Circuit BE Loop Analysis: From KVL: IB Solving for IB (1)

6. Fixed Biased Circuit CE Loop Analysis: From KVL: IC2 IC
As we know IC = dcIB
Substituting IB from equation (1)
VCE = VC
In addition, since
VBE = VB - VE
Also note that
VCE = VC - VE
Since VE = 0
VBE = VB
But VE = 0

7. Fixed Biased Circuit DISADVANTAGE
Unstable – because it is too dependent on β and produce width change of Q-point
For improved bias stability , add emitter resistor to dc bias.

8. Example 1: Determine the Following
for the given Fixed Biased Circuit.
IBQ and ICQ (b) VCEQ
(c) VBC
Solution:

9. Example 2: For the given fixed bias circuit, determine IBQ, ICQ, VCEQ, VC, VB and VE. Solution:

10. Example 3: Given the information appearing in the Fig
Example 3: Given the information appearing in the Fig. (a) , determine IC, RC, RB, and VCE. Solution: IC = 3.2 mA, RC = 1.875k, RB = k, VCE = 6 V. Example 4: Given the information appearing in Fig. (b), determine IC, VCC,  and RB. Solution: IC = 3.98 mA, VCC = V,  = 199, RB = 763 k.
Fig. (a)
Fig. (b)

11. Load line Analysis with Fixed Bias Circuit
DC load line is drawn by using the following equations:
VCE = VCC

12. Load line Analysis with Fixed Bias Circuit
Effect of Varying IB on the Q-Point:

13. Load line Analysis with Fixed Bias Circuit
Effect of varying VCC on the Q-Point:

14. Load line Analysis with Fixed Bias Circuit
Effect of varying RC on the Q-Point:

15. Example: Given the load line and the defined Q-point , determine the required values of VCC, RC, and RB for a fixed bias configuration. Solution: VCE = VCC = 20 V

16. Emitter-Stabilized Bias Circuit
An emitter resistor, RE is added to improve stability
Solve the circuit using KVL.
1st step: Locate capacitors and replace them with an open circuit
2nd step: Locate 2 main loops which;
BE loop
CE loop
Resistor RE added

17. Emitter-Stabilized Bias Circuit
1st Step: Locate capacitors and replace them with an open circuit.

18. Emitter-Stabilized Bias Circuit
2nd Step: Locate two main loops 2 1 2 1

19. Emitter-Stabilized Bias Circuit
BE Loop Analysis:
Using KVL: 1
Recall that IE = ( + 1)IB

20. Emitter-Stabilized Bias Circuit
CE Loop Analysis:
From KVL: 2
Substituting IE  IC we get

21. Example: For the given emitter bias network, determine IB, IC, VCE, VC, VE, VB and VBC. Solution:

22. Load line Analysis for Emitter Stabilized Bias Circuit
The collector-emitter loop equation that defines the load line is:
Choosing IC = 0 gives
And choosing VCE = 0 gives

23. Example: For the given emitter stabilized bias circuit, determine IBQ, ICQ, VCEQ, VC, VB, VE. Solution:

24. Voltage Divider Bias Provides good Q-point stability
with a single polarity supply voltage
Solve the circuit using KVL
1st step: Locate capacitors and
replace them with an open
circuit
2nd step: Simplify circuit using
Thevenin Theorem
3rd step: Locate 2 main loops which;
BE loop
CE loop

25. Voltage Divider Bias
1st step: Locate capacitors and replace them with an open circuit

26. Voltage Divider Rule
2nd step: Simplify the circuit using Thevenin Theorem
From Thevenin’s Theorem

27. 3rd step: Locate 2 main loops.
Voltage Divider Bias
3rd step: Locate 2 main loops.
BE Loop
CE Loop 1 2 2 1

28. Voltage Divider Bias
BE Loop Analysis:
From KVL:
But 1

29. Voltage Divider Bias
CE Loop Analysis:
From KVL: 2
Assume
IC  IE

30. DC load line with Voltage Divider Bias
The dc load line can be drawn from the following equation: IC
VCE
VCC

31. Example: Determine the dc bias voltage VCE and the current IC for the given voltage divider configuration. Solution:

32. DC Bias with Voltage Feedback

33. DC Bias with Voltage Feedback
Using KVL:
In this circuit, IB is assumed
to be very small and
I’C  IC = IC. The above
Equation may therefore be
Re-written as
BE Loop

34. DC Bias with Voltage Feedback
Since I’C  IC and IC  IE, we have
CE Loop

35. Example: Determine the quiescent level of ICQ and VCEQ for the given network. Solution: