1. Chun-Yao Wang ( 王俊堯 ) 2011/12/16 Department of Computer Science, National Tsing Hua University Hsinchu, Taiwan, R.O.C.

2.  Introduction  Rewiring  Simplification  Experimental results  Conclusion 2Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

3.  Introduction  Rewiring  Simplification  Experimental results  Conclusion 3Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

4.  A linear threshold gate (LTG) is an n binary input and one binary output function: T x1x2xnx1x2xn f w 1 w 2 w n 4 … … n binary inputs x 1, x 2, …,x n with weights w 1, w 2, …,w n a single binary output f a threshold value T f = 1 if 0 if Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C. 2 x1x2x3x1x2x3 f 1 2 x1x1 x2x2 x3x3 f 0000 0011 0100 0111 1000 1011 1101 1111 Threshold logic gate f x1x2x1x2 x3x3

5.  In comparison to Boolean logic, threshold logic representation has a shorter depth and less nodes in a network.  Threshold logic network v.s. Boolean logic network. 5 5 nodes and 3 levels6 nodes and 4 levels Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

6.  A threshold logic network is generated by an ILP-based approach [1].  Each LTG can be expressed in a canonical form which has the minimal summation of weights and threshold values.  The weights and threshold value of a threshold function are positive integers [2]. 6 1 x1x2x3x1x2x3 f 2 1 y 3 = x 3 ’ 2 x1x2x3x1x2x3 f 2 1 Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C. [1] R. O. Winder, “Threshold Logic.” Ph.D. dissertation, Princeton University, Princeton, NJ,1962. [2] S. Muroga, “Threshold Logic and its Applications”. New York, NY: John Wiley, 1971.

7.  Introduction  Rewiring  Simplification  Experimental results  Conclusion 7Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

8.  Given:  A threshold network.  An irredundant target wire.  Objective:  To rectify the changed functionality of the original threshold network due to the target wire removal by adding threshold logic gates at other locations. Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.8

9.  Rewire any target wire in a threshold network without changing its functionality.  It only depends on the information of the inputs and weights and the threshold value in each LTG. Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.9

10.  Synthesis and optimization  Generate a threshold network with a new fanin number constraint instead of resynthesizing. 10Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

11. 11Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C. Grouping and decomposition Rectify at the transitive fanout cone? Yes The target wire is critical? START END Rectification The useless input removal Rectification network construction OR connection Rectification The useless input removal Rectification network construction OR connection Rectification Threshold value change Rectification network construction AND connection Rectification Threshold value change Rectification network construction AND connection Input: A threshold network and a target wire Input: A threshold network and a target wire No Output: The synthesized threshold network Output: The synthesized threshold network Yes No Simplification Target wire removal Rectification Threshold value change Rectification network construction at each input AND connection Rectification Threshold value change Rectification network construction at each input AND connection Case 1Case 2 Case 3

12.  Objective: To separate the inputs and the corresponding weights into different groups.  Step 1: Separate an input whose weight is equal to the threshold value of the objective gate as a single group.  Step 2: Separate the remaining inputs as another group.  Each group can be extracted as a new decomposition gate.  We then group-wise treat the inputs of an LTG after this grouping process. 12 3 abcdabcd f 1 3 3 f 3 abcabc d 1 The decomposition gate Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

13.  Definition 1: A single group LTG is useless if and only if it is an empty gate or it outputs zero for all input combinations.  Theorem 1: Given a nonempty LTG, it is useless if and only if it satisfies the following equation, where n is the number of inputs in this gate. 13 The threshold logic gate is useless because it outputs zero for all input combinations. 4 abcabc f 1 Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

14.  Definition 2: An input in a single group LTG is critical if and only if this LTG will become useless after removing this input.  Theorem 2: Given a single group LTG, an input x j with its corresponding weight w j is critical if and only if it satisfies the following equation, where n is the number of inputs in this gate. 14 The gate will become useless after removing a => input a is critical. 3 abcabc f 2 1 Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

15.  Definition 3: An input is useless if and only if the output of this LTG is intact when this input toggles under all input combinations.  Theorem 3: Given an input x j with its corresponding weight w j, x j is useless if and only if it satisfies either EQ(A) or EQ(B) for each input combination, where n is the number of inputs in this gate. 15 The output is intact when input c toggles for all input combinations => Input c is useless and (A) (B) 5 abcabc f 3 2 1 Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

16.  Remove the target wire and its corresponding weight from the objective gate directly.  Two possible results. ▪ A normal threshold logic gate. ▪ A useless threshold logic gate. 16Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C. Grouping and decomposition Rectify at the transitive fanout cone? Yes The target wire is critical? START END Rectification The useless input removal Rectification network construction OR connection Rectification The useless input removal Rectification network construction OR connection Rectification Threshold value change Rectification network construction AND connection Rectification Threshold value change Rectification network construction AND connection Input: A threshold network and a target wire Input: A threshold network and a target wire No Output: The synthesized threshold network Output: The synthesized threshold network Yes No Simplification Target wire removal Rectification Threshold value change Rectification network construction at each input AND connection Rectification Threshold value change Rectification network construction at each input AND connection Case 1Case 2 Case 3

17.  Definition 4: A single group LTG has a critical-effect if and only if there exists an assignment such that the output changes from 1 to 0 when each one of its inputs in this assignment changes from 1 to 0.  A vector where an LTG has a critical-effect is called a critical-effect vector.  Theorem 4: Given a single group LTG, the LTG has a critical- effect if it satisfies the following equation, where n is the number of inputs in this gate. 17 5 abcdabcd f 3 2 1 Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C. abcdf 11001 abcdf 10000 01000 abcdf 10111 abcdf 10100 10010 00110

18.  Case 1: The target wire is not critical:  The remaining objective gate will not become useless. ▪ Keep the threshold value intact. ▪ Analyze the functionality among all inputs of an LTG with critical- effect vectors for the construction of rectification network. 18Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

19.  We use critical-effect vectors to construct the rectification network in our algorithm.  The loss of a subfunction only occurs when removing a target input which is assumed to be 1 in a critical-effect vector. 19 abcf 0000 0010 0100 0110 1000 1011 1101 1111 3 abcabc f 2 1 Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

20.  Given a single group LTG and the target wire x t, the rectification network construction is described as follows:  Step 1: Remove any useless input.  Step 2: Get all critical-effect vectors where x t assumed to be 1.  Step 3: Collect all inputs that are assumed to be 1 in these critical- effect vectors 20 The objective gate and the target wire a Inputs a, b and e are found in the critical-effect vector 11001. Inputs a, c and e are found in the critical-effect vector 10101. abcde 11001 10101 00011 The critical-effect vectors abcdeabcde f 3 1 4 6 10 dede n1n1 4646 The remaining objective gate Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

21.  Step 4: Get the rectification network by creating a new gate consisting of the inputs found in step 3 with its corresponding weight and threshold value of the objective gate.  Step 5: Connect the remaining objective gate to this rectification network with an OR gate. 21 The remaining objective gate The rectification network abceabce n2n2 3 1 6 10 dede n1n1 4646 abceabce n2n2 3 1 6 10 dede n1n1 4646 f 1111 1 Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

22.  Case 2: The target wire is critical, and we rectify it at the transitive fanout cone:  It will cause a useless gate after the removal.  Given a single group LTG and the target wire x t, the rectification network construction is described as follows:  Step 1: Decrease the threshold value of the remaining objective gate by w t.  Step 2: The rectification network is the target wire only.  Step 3: Connect the remaining objective gate to this rectification network with an AND gate at its transitive fanout cone. 22 The objective gate and the target wire e. abcdeabcde f 3 1 4 6 10 The remaining objective gate abcdabcd n1n1 3 1 4 4 e f 1111 2 abcdabcd n1n1 3 1 4 4 Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

23.  Case 3: The target wire is critical, and we rectify it at the transitive fanin cone:  It will cause a useless gate after the removal.  Given a single group LTG and the target wire x t, the rectification network construction is described as follows:  Step 1: Decrease the threshold value of the remaining objective gate by w t.  Step 2: The rectification network is the target wire only.  Step 3: Connect rectification network to each input, respectively, in the remaining objective gate with an AND gate at its transitive fanin cone. 23Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

24. 24 The objective gate and the target wire e. abcdeabcde f 3 1 4 6 10 The remaining objective gate abcdabcd n1n1 3 1 4 4 Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C. f 3 1 4 4 e 1111 2 b e 1111 2 c e 1111 2 d e 1111 2 a  Case 3: The target wire is critical, and we rectify it at the transitive fanin cone:

25.  Introduction  Rewiring  Simplification  Experimental results  Conclusion 25Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

26.  After the target wire removal and the rectification network construction, the appearances of some LTGs may be changed such that they cannot be canonically represented.  A simplification procedure transforms a single group LTG to its canonical representation.  Minimum positive weights and threshold value. 26Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

27. 27 Get the critical-effect vectors Update the LTG and divide the LTG by a common divisor Divide the LTG by a common divisor Divide the LTG by a common divisor Decrease the input weight and the threshold value sequentially START There exists an input weight to decrease? There exists an input weight to decrease? END No Yes No Input A given LTG Input A given LTG Output The canonical LTG Output The canonical LTG Yes This decrement is valid ? Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

28.  Keep the functionality intact while gradually decreasing the input weights and the threshold value.  Checking the functional equivalence after a weight and the threshold value decrement is necessary.  Theorem 5: Given two single group LTGs, they are functionally equivalent if and only if they have the same critical-effect vectors. Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.28 abcdf 01111 10111 9 2 3 4 abcdabcd f 8 1 3 4 abcdabcd f abcdf 01111 10111

29.  Given a single group LTG, the simplification procedure is described as follows:  Step 1: Ensure that the weights for all inputs and threshold value have no common divisor which is larger than 1.  Step 2: Keep the critical-effect vectors. 29 9 2 3 4 abcdabcd f Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C. 4 6 8 abcdabcd f 18 9 2 3 4 abcdabcd f abcdf 01111 10111

30.  Step 3: Iteratively decrease each input weight and the threshold value and then get a updated representation. ▪ If we decrease a unique weight by 1 in an LTG, the threshold value is decreased by 1 as well. ▪ The weights of inputs that have the same weight must be simultaneously decreased. ▪ The corresponding threshold value is decreased by the number of 1 in these same-weight inputs of any critical-effect vector. Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.30 9 2 3 4 abcdabcd f 8 1 3 4 abcdabcd f 9 2 3 4 abcdabcd f 8 2 3 abcdabcd f abcd Critical Effect 0111Yes 1011

31.  Step 4: Verify if the functionality between the original LTG and the updated LTG intact or not after each weight-decreasing operation. ▪ Step 4-a: If their critical-effect vectors are different, the weight- decreasing operation is invalid. The operation undoes the decrement and then switches the operation to the other inputs. ▪ Step 4-b: If their critical-effect vectors are identical, this weight- decreasing operation is valid.  Step 5: Terminate the simplification procedure if any weight- decreasing operation is invalid. Or return to step 3. 31Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

32.  If an invalid decrement by one on one input occurs, the weight decrement by two on the same input must be invalid.  Theorem 6: Given an n-input (x 1 ~x n ) single group LTG with the symmetric inputs x j ~x j+m G1 (w 1, w 2, w 3, …, w j, w j+1,…, w j+m,…, w n-1, w n-1 ; T), the weight-decreasing operation on x j ~x j+m that decreases w j ~w j+m by d are valid if the weight- decreasing operation on x j ~x j+m that decreases w j ~w j+m by D is valid, where 0 < d < D. m is zero iff x j is an input with a unique weight. Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.32 4 6 8 abcdabcd f 18 2 6 8 abcdabcd f 16 3 6 8 abcdabcd f 17 Original LTG before the weight-decreasing operations

33. Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.33 4 6 8 abcdabcd f 18 abcdf 01111 10111 9 2 3 4 abcdabcd f 8 1 3 4 abcdabcd f Decrease the weights in inputs a, b abcdf 01111 10111 7 1 2 4 abcdabcd f Decrease the weight in input c abcdf 01111 10111 6 1 2 3 abcdabcd f abcdf 01111 10111 Decrease the weight in input d 5 1 3 abcdabcd f abcdf 01111 10111 11011 Decrease the weight in input c 5 1 2 abcdabcd f abcdf 01111 10111 Decrease the weight in input d 3 1 abcdabcd f abcdf 01111 10111 11011 11101 Decrease the weights in inputs c, d

34.  Introduction  Rewiring  Simplification  Experimental results  Conclusion 34Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

35.  The experiments show the logic restructuring capability our rewiring algorithm offers.  We reconstruct a threshold network using our rewiring algorithm. 35 benchmark|gate||wire||rewiring|r_times_time i2c176769881.641.76 usb_phy2809371340.854.67 simple_spi2888401391.344.23 pci_spoci_ctrl3859051091.733.54 alu441014072102.666.57 s923455418303522.0312.74 C354073116883872.0813.56 dalu81025794773.1016.17 s1320784822354502.7615.32 C531587928045943.1318.85 C628897034853942.4013.10 rot98028786103.3519.43 C7552106638867014.4825.62 tv80118934856143.8020.35 spi164647038325.8422.60 i101814589311456.5835.22 systemcdes190747668767.1324.36 des1920518010086.3731.49 aes_core34171362215528.6047.02 mem_ctrl34551465520936.8866.70 s38417428020139291512.0793.43 b2044311402025628.5786.40 ac97_ctrl57321790625609.4882.55 b21584413481349510.20110.40 usb_funct661221613247412.4170.75 systemcaes688522674365615.43102.80 s38584689727750254614.8083.76 b22765632771389519.75106.80 pci_bridge32834429640498321.14134.30 b171346039007914047.82215.45 wb_conmax15719477311087270.05232.70 Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

36.  We demonstrate the efficiency of our rewiring algorithm for resynthesizing a threshold network with different fanin number constraints. 36 Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C. benchmark| gate || wire |[3] (s)Ours (s)Impr. % i2c1767698.63.2462.3 usb_phy2809372.541.6734.2 simple_spi2888402.481.8425.8 pci_spoci_ctrl3859052.172.084.1 alu441014071.731.682.8 s923455418305.622.8549.3 C354073116883.162.6815.2 dalu81025795.061.7365.8 s1320784822352.922.3220.5 C5315879280421.59.4656 C6288970348510.657.3331.2 rot980287811.64.858.6 C755210663886233.7683.7 tv801189348524.1214.6939.1 spi1646470367.8525.2262.8 i101814589354.56.3788.3 systemcdes19074766127.822.3182.5 des1920518083.716.7579.9 aes_core341713622402.638.7390.4 men_ctrl345514655210.5636.3282.8 s38417428020139142.231.2278.0 b20443114020364.5258.2284.0 ac97_ctrl573217906288.8746.3383.9 b21584413481177.8551.8670.8 usb_funct661221613293.2642.1385.6 systemcaes688522674286.438.7386.5 s38584689727750525.7283.7484.1 b22765632771320.0452.0483.7 pci_bridge32834429640355.5246.1287.0 b171346039007941.67102.1289.2 wb_conmax15719477311386.34108.2492.2 TOTAL 6154.55866.58 AVERAGE 198.5327.9563.3 RATIO 7.11 [3] R. Zhang, P. Gupta, L. Zhong, and N. K. Jha, “Synthesis and Optimization of Threshold Logic Networks with Application to Nanotechnologies,” in Proc. Design Automation Test in Europe Conf., 2004, pp. 904-909.

37.  Introduction  Rewiring  Simplification  Experimental results  Conclusion 37Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

38.  We proposes a new rewiring technique for threshold networks.  It works by directly removing the target wire and then correcting the functionality by adding the corresponding rectification networks.  A simplification procedure for canonicity that is directly applied to a single LTG is also proposed.  When the threshold logic becomes active in the research of VLSI circuits, this rewiring algorithm will facilitate its applications to logic synthesis and various optimization goals. 38Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

39.  Thanks for your attention. Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.39

40. Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.40