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1 ENGR 254 Lecture 6 2-2-09 2 DeMorgan Symbol Equivalence.

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Presentation on theme: "1 ENGR 254 Lecture 6 2-2-09 2 DeMorgan Symbol Equivalence."— Presentation transcript:

1

2 1 ENGR 254 Lecture 6 2-2-09

3 2 DeMorgan Symbol Equivalence

4 3 Likewise for OR (be sure to check errata!) FIG 4-4

5 4 DeMorgan Symbols

6 5 Definitions (Sec. 4.1.6) Literal – A variable or the complement of a variable. Example X, Y, Y’, etc. Product term – A single literal or product of literals. Example: Sum-of-products expression – A logical sum of product terms. Example: Sum term – A single literal of sum of literals. Example: Product-of-sums expression – A logical product of sum terms. Example:

7 6 Definitions Normal term – A product or sum term in which no variable appears more than once. –Example non-normal: –Example normal: Minterm (n variables) – A normal product term with n literals. Example: Maxterm (n variables) – A normal sum term with n literals. Example:

8 7 Truth table vs. minterms & maxterms

9 8 Combinational analysis XYZF 0000 0011 0101 0110 1000 1011 1100 1111 0 1 2 3 4 5 6 7

10 9 Signal expressions Multiply out: F = ((X + Y)  Z) + (X  Y  Z) = (X  Z) + (Y  Z) + (X  Y  Z)

11 10 New circuit, same function F = X  Z + Y  Z + X  Y  Z

12 11 “Add out” logic function Circuit:

13 12 Shortcut: Symbol substitution

14 13 Different circuit, same function

15 14 Another example

16 15 Sum-of-products form AND-OR NAND-NAND

17 16 Product-of-sums form OR-AND NOR-NOR P-of-S preferred in CMOS, TTL (NAND-NAND)

18 17 Brute-force design Truth table --> canonical sum (sum of minterms) Example: prime-number detector –4-bit input, N 3 N 2 N 1 N 0 row N 3 N 2 N 1 N 0 F 0 0 0 0 0 0 1 0 0 0 1 1 2 0 0 1 0 1 3 0 0 1 1 1 4 0 1 0 0 0 5 0 1 0 1 1 6 0 1 1 0 0 7 0 1 1 1 1 8 1 0 0 0 0 9 1 0 0 1 0 10 1 0 1 0 0 11 0 0 1 1 1 12 1 1 0 0 0 13 1 1 0 1 1 14 1 1 1 0 0 15 1 1 1 1 0 F(N 3, N 2, N 1, N 0 ) =   (1,2,3,5,7,11,13)

19 18 Minterm list --> canonical sum

20 19 Algebraic simplification Theorem T8, Reduce number of gates and gate inputs

21 20 Resulting circuit


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