1. Lecture 1 Introduction to Computing Machinery

2. Colossus 1600 1700 1800 1900 2000 Joseph Marie Jacquard Charles Babbage Augusta Ada Countess of Lovelace Herman Hollerith Alan Turing Gottfried Leibniz Stepped Reckoner Blaise Pascal Pascaline Programmable LoomDifference Engine Turing Test Programming the Analytical EngineComputable Number PaperElectronic Tabulating System design of ACE Early History of Computing Machines

3. Z = X + Y LDA X ADD Y STO Z HLT X 10 Y 12 Z data instructions High-Level Programming Language Assembly Language 00000 00001 00010 00011 00100 00101 00110 00000100 01000101 00100110 11100000 00001010 00001100 00000000 address instruction Machine Language Levels of Programming Languages

4. The concept of a stored program was part of the design of the Analytical Engine and well understood by Charles Babbage and Augusta Ada more than 150 years ago. For some reason, this concept was temporarily lost or forgotten by the middle of the 20th century. Early electronic computers, such as the ENIAC, kept the logic and arithmetic instructions separate from the data. Some early computers had to be rewired in order to change their programs. The interpretation of a word in memory as either an instruction or data is determined by its location in memory rather than its pattern of ones and zeros. The content of memory has more than one possible interpretation. For example, the bit pattern, 01000000110010010000111111011010 can represent the integer 1,086,918,618 or an instruction to JUMP to another location (address) in memory, or it could represent an approximation for the numeric value of . The Von-Neumann Architecture

5. Designing the Very Simple Computer VSC Instruction operations codeaddress 3-bits limits the number of instructions to 2 3 = 8 5-bit limits the number of words to 2 5 = 32 8-bit instructions will all be direct addressing mode data type will be integer, twos'-complement operations will correspond to Post-Turing language with only 8 instructions, the VSC is the "Ultimate RISC" Computer

6. The Very Simple Computer

7. The Instruction Set LDA addr - load the accumulator with the value from memory at address addr STA addr - store the value in the accumulator into memory at address addr. ADD addr - add value in memory at address addr to ACC and store in LAT1. CMP addr - take the 1's complement of the value in memory at address addr BNN addr - the branch-not-negative statement will set PC = addr if the value in the accumulator is not negative. SHL addr - shift value in memory at address addr one bit to the left. SHR addr - shift value in memory at address addr one bit to the right (arithmetic). HLT - this instruction terminates the fetch-execute cycle.

8. The Fetch/Execute Cycle get the address of the next instruction load the instruction register with the next instruction get the address in the current instruction increment to program counter move the value in the ALU ACC into LAT2 move the data referred to by the instruction into LAT1 execute the instruction

9. Programming the VSC addr label instruction addr machine code. 0 LDA A 00000 00000100 1 ADD B 00001 01000101 2 STO C 00010 00100110 3 HLT 00011 11111111 4 A 24 00100 00011000 5 B 30 00101 00011110 6 C 0 00110 00000000