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CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Memory Systems How to make the most out of cheap storage.

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Presentation on theme: "CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Memory Systems How to make the most out of cheap storage."— Presentation transcript:

1 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Memory Systems How to make the most out of cheap storage

2 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Memory so far We have discussed two structures that hold data: –Register file (little array of storage) –“Memory” (bigger array of storage) How do we implement memory? –What technologies?

3 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst SRAM Technology A single SRAM cell requires 6 transistors When the word line “selects” the nMOS transistors, the voltage difference between the two bit lines is “sensed” to determine the stored value

4 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst DRAM Technology A single DRAM cell requires 1 transistor and 1 capacitor When the word line “selects” the nMOS transistor, the charge in the capacitor is “sensed” on the bit line –refreshing is required for all reads (destructive read) and on regular intervals (due to leakage of capacitor)

5 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Memory Hierarchy We want to have lots of memory for our processor: –LC2K needs 2 16 words of memory ( ~ 256 KB) –MIPS needs 2 32 bytes of memory ( ~ 4 GB ) –x86-64 needs 2 64 bytes of memory ( ~ 16 exabytes ) What are our choices? –SRAM, DRAM, Magnetic Disk, paper?

6 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Option 1: build it out of fast SRAM On-chip memory –Fabricated in the same technology as the processor About 2-10 ns access (depending on size) –Decoders are big –Array are big It will cost LOTS of money –SRAM costs $10 per megabyte $2.50 for LC2K $40,960 for MIPS $175 trillion for x86-64

7 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Option 2: build it out of DRAM About 50 ns access –Why build a fast processor that stalls for dozens of cycles on each memory load? Still costs lots of money for new machines –DRAM costs $0.015 per megabyte –< $0.001 for LC2K –$54.99 for MIPS –$236 billion for x86-64

8 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Option 3: build it using Disks About 10,000,000 ns access (snore!) –We could have stopped with the Intel 4004 Costs are pretty reasonable –Disk storage costs ~ $0.0001 per megabyte –Basically free for LC2K –$0.50 for MIPS –$23 billion for x86-64 (ouch!)

9 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Option 4: build it using Tape Drives About 100,000,000,000 ns access –Time to load tape and wind it to the right position –Faster than chiseling it on a stone tablet Costs are pretty reasonable –Tape storage costs $0.00017 per megabyte (about ½ the cost of disk) –Basically free for LC2K –$0.80 for MIPS –$35 billion for x86-64 (ouch!)

10 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Option 5: build it using Optical Disks (CD/DVD) About 50,000,000 ns access (about 5-10x Hard disks) –Depends mostly on seeking out the data. –Writing to this media is much slower. Costs are pretty reasonable –Disk storage costs $0.00002 per megabyte –Basically free for LC2K –$0.08 for MIPS –$400 million for x86-64

11 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Our requirements We want a memory system that runs a processor clock speed –about 1 ns access –Otherwise, why bother pipelining? We want a memory system that we can afford –maybe 25% to 33% of the total system costs Options 2-5 are too slow (1 is pretty close) Options 1-2 (at least) are too expensive Time for option 6!

12 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Option 6: Use a little of everything (wisely) Use a small array of SRAM –Big enough to hold whatever you use most often –Small means fast! –Small means cheap! Use a larger amount of DRAM –And hope that you rarely have to use it Use a really big amount of Disk storage –Disks are getting cheaper at a faster rate than we fill them up with data (for most people) Don’t try to buy 2 64 bytes of anything –It would take decades to format it anyway!

13 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Option 6: The Memory Hierarchy Use a small array of SRAM –For the CACHE (hopefully for most accesses) Use a bigger amount of DRAM –For the Main memory Use a really big amount of Disk storage –For the Virtual memory (i.e. everything else)

14 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Famous Picture of Food Memory Hierarchy Cache Main Memory Disk Storage CostLatencyAccess Freq. CPU

15 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst A Favorite Cache Analogy Hungry! must eat! –Option 1: go to refrigerator Found  eat! Latency = 1 minute –Option 2: go to store Found  purchase, take home, eat! Latency = 20-30 minutes –Option 3: grow food! Plant, wait … wait … wait …, harvest, eat! Latency = ~250,000 minutes (~ 6 months) Crazy fact: ratio of growing food:going to the store = 10,000 ratio of disk access:DRAM access = 200,000

16 CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Rehashing our terms The Architectural view of memory is: –What the machine language sees –Memory is just a big array of storage Breaking up the memory system into different pieces – cache, main memory (made up of DRAM) and Disk storage – is not architectural. –The machine language doesn’t know about it –The processor may not know about it –A new implementation may not break it up into the same pieces (or break it up at all). Caching needs to be Transparent!


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