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Www.ee.ntou.edu.tw Department of Electrical Engineering, National Taiwan Ocean University Analog-to-Digital Converter (ADC) 4/18/2013 Richard Kuo Assistant.

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Presentation on theme: "Www.ee.ntou.edu.tw Department of Electrical Engineering, National Taiwan Ocean University Analog-to-Digital Converter (ADC) 4/18/2013 Richard Kuo Assistant."— Presentation transcript:

1 www.ee.ntou.edu.tw Department of Electrical Engineering, National Taiwan Ocean University Analog-to-Digital Converter (ADC) 4/18/2013 Richard Kuo Assistant Professor

2 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Outline ► 7.NuMicro_ADC.ppt ► Analog-to-Digital Conversion Introduction –Direct-Conversion, Successive Approximation, Delta-Sigma ► NuMicro ADC Introduction ► Exercises –Use ADC to read variable resistor VR1 (Smpl_ADC_VR1) –Use ADC to read thermistor (Smpl_ADC_Thermistor) –Use ADC to read resistive touch panel (Smpl_ADC_Touch)

3 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Analog-to-Digital Applications ► NUC140 : 8-channel 12-bit 800KSPS ADC ► Smart Meter use16/24-bit ADC ► Electronic Scale use 16/24-bit ADC ► Audio sampling : 96KHz, 24-bit Stereo ADC

4 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw ADC Architectures ► Direct-Conversion ADC ► SAR (Successive Approximation Register) ADC ► ΔΣ (Sigma-Delta) ADC Direct-Conversion ADC SAR ADC Successive Approximation Register Sigma-Delta ADC

5 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Direct-Conversion ADC

6 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw SAR (Successive Approximation Register) ADC ► DAC = Digital-to-Analog converter ► EOC = end of conversion ► SAR = successive approximation register ► S/H = sample and hold circuit ► V in = input voltage ► V ref = reference voltage Charge-Scaling DAC

7 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Charge-redistribution successive approximation ADC ► As the first step in the binary search algorithm, the bottom plate of the MSB capacitor is disconnected from ground and connected to V REF. This drives the common terminal in the positive direction by an amount equal to ½V REF. Therefore, V COMMON = -V IN + ½ × V REF ► The comparator output yields a logic 1 if V COMMON ½ × V REF ). The comparator output yields logic 0 if V IN < ½ × V REF. ► If the comparator output is logic 1, then the bottom plate of the MSB capacitor stays connected to V REF. Otherwise, the bottom plate of the MSB capacitor is connected back to ground. ► This continues until all the bits have been determined. ► V COMMON = -V IN + B N-1 × V REF /2 + B N-2 × V REF /4 + B N-1 × V REF /8 +... + B0 × V REF /2 N-1

8 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw An Introduction to Delta Sigma Converter http://www.beis.de/Elektronik/DeltaSigma/DeltaSigma.html Block Diagram of a First Order Digital Delta Sigma Modulator Block Diagram of a First Order Analogue Delta Sigma Modulator Signals within a First Order Analogue Modulator

9 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw NuMicro ADC ► 12-bit SAR ADC ► Analog input voltage range: –0~Vref (Max to 5.0V). ► Operation voltage: –AVDD=3.0V~5.5V; ► Input channel: –Up to 8 single-end analog input channels –4 pairs of differential analog input channel. ► Up to 700~800KHz conversion rate. ► The maximum ADC operating frequency is 16M Hz ► Three operation modes –Single mode –Single-cycle mode –Continuous scan mode

10 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw NuMicro ADC block diagram Conversion Results ADC Configuration Control Channel Selection External Trigger Pin 4 options: falling/rising /high/low Reference Voltage Input ADC PDMA Request ADC Interrupt Request

11 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw NuMicro ADC clock source The maximum ADC clock frequency is 16MHz The ADC clock frequency = (ADC clock source frequency) / (ADC_N+1); ADC_N is an 8-bit pre-scaler

12 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw NuMicro ADC pins ► The ADC input pins share with GPIO port A ► The ADC input pins must be configured in input type ► Single-end input mode –Channel 0 ~ Channel 7 share with GPA0~GPA7 ► Differential input mode –Channel 0 ~ Channel 3 –Differential input channels are the paired channels Differential input paired channel Single-end input channel 001 123 245 367

13 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Single scan mode Channel0 Channel2Channel3 Channel7

14 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Continuous scan mode Channel0 Channel2 Channel3Channel7 Channel0 Channel2

15 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Control Flow of ADC interrupt

16 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw NuMicro MCU Learning Board VR1 Learning Board ADC use VCC33 (3.3V) ADC0~7(GPA0~7)

17 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw 17 void InitADC(void) { GPIOA->OFFD|=0x00800000; //Disable digital input path SYS->GPAMFP.ADC6_AD7=1; //Set pin to ADC function SYSCLK->CLKSEL1.ADC_S = 2;//Select 22Mhz for ADC SYSCLK->CLKDIV.ADC_N = 1;//ADC clock source = 22Mhz/2 =11Mhz; SYSCLK->APBCLK.ADC_EN = 1;//Enable clock source ADC->ADCR.ADEN = 1;//Enable ADC module ADC->ADCR.DIFFEN = 0; //select single-end input ADC->ADCR.ADMD = 0; //select single mode ADC->ADCHER.CHEN = 0x40; // select ADC channel bit [7:0] ADC->ADSR.ADF =1; //clear the interrupt flags for safe ADC->ADCR.ADIE = 1; // enable ADC interrupt //NVIC_EnableIRQ(ADC_IRQn); /* Step 6. Enable WDT module */ ADC->ADCR.ADST=1;// Enable ADC trigger } InitADC

18 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw int32_t main (void) { int32_t adc_value; UNLOCKREG(); SYSCLK->PWRCON.XTL12M_EN = 1; //Enable 12Mhz and set HCLK->12Mhz SYSCLK->CLKSEL0.HCLK_S = 0; LOCKREG(); InitADC(); while(1) { while(ADC->ADSR.ADF==0); // ADC Flag, wait till 1 (A/DC conversion done) ADC->ADSR.ADF=1; // write 1 to ADF is to clear the flag adc_value=ADC->ADDR[7].RSLT; // input 12-bit ADC value seg_display(adc_value); // display value to 7-segment display ADC->ADCR.ADST=1; // activate next ADC sample // 1 : conversion start // 0 : conversion stopped, ADC enter idle state } Smpl_ADC_VR1

19 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Thermistor Symbol Two-wire connection Variable Resistance per Temperature : ~500,1K,5K,10K ohm for Automotive

20 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Thermistor Application Circuit Vcc3.3V Gnd ADC6 (GPA6) 10Kohm 0~10Kohm Sample Code : Smpl_ADC_Thermistor Learning Board’s ADC VCC use 3.3V

21 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Smpl_ADC_Thermistor Thermistor

22 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Smpl_ADC_Thermistor void InitADC(void) { /* Step 1. GPIO initial */ GPIOA->OFFD|=0x00800000; //Disable digital input path SYS->GPAMFP.ADC6_AD7=1; //Set ADC function /* Step 2. Enable and Select ADC clock source, and then enable ADC module */ SYSCLK->CLKSEL1.ADC_S = 2;//Select 22Mhz for ADC SYSCLK->CLKDIV.ADC_N = 1;//ADC clock source = 22Mhz/2 =11Mhz; SYSCLK->APBCLK.ADC_EN = 1;//Enable clock source ADC->ADCR.ADEN = 1;//Enable ADC module /* Step 3. Select Operation mode */ ADC->ADCR.DIFFEN = 0; //single end input ADC->ADCR.ADMD = 0; //single mode /* Step 4. Select ADC channel */ ADC->ADCHER.CHEN = 0x40; // channel bit [7:0] /* Step 5. Enable ADC interrupt */ ADC->ADSR.ADF =1; //clear the A/D interrupt flags for safe ADC->ADCR.ADIE = 1; //NVIC_EnableIRQ(ADC_IRQn); /* Step 6. Enable WDT module */ ADC->ADCR.ADST=1; }

23 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Smpl_ADC_Thermistor while(1) { while(ADC->ADSR.ADF==0); ADC->ADSR.ADF=1; adc_value = ADC->ADDR[6].RSLT & 0x0FFC; r = R * (4096 - adc_value) / adc_value; // adc_value = 4096 * R / (R+r); sprintf(TEXT1+7,"%d", adc_value); print_lcd(1, TEXT1); sprintf(TEXT2+7,"%d", r); print_lcd(2, TEXT2); temp = 25; // transform from adc_value to temperature by resistance curve in datasheet sprintf(TEXT3+7,"%d", temp); print_lcd(3,TEXT3); Delay(1000); ADC->ADCR.ADST=1; }

24 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Resistive Touch 4-wire cellphone panel ► X+ : GPA0/ADC0 ► X- : GPA2 ► Y+ : GPA1/ADC1 ► Y- : GPA3

25 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Resistive Touch Principle

26 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw Smpl_ADC_Touch

27 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw while(1) { DrvADC_Open(ADC_SINGLE_END, ADC_SINGLE_CYCLE_OP, 0x01, INTERNAL_HCLK, 1); // ADC0 DrvGPIO_Open(E_GPA, 1, E_IO_OUTPUT); DrvGPIO_Open(E_GPA, 3, E_IO_OPENDRAIN); DrvGPIO_SetBit(E_GPA,1); DrvGPIO_ClrBit(E_GPA,3); // Measuring X-axis DrvADC_StartConvert(); // start A/D conversion while(DrvADC_IsConversionDone()==FALSE); // wait till conversion is done temp = DrvADC_GetConversionData(0); DrvGPIO_Close(E_GPA,1); DrvGPIO_Close(E_GPA,3); DrvADC_Close(); temp = temp & 0x0ffc; sprintf(TEXT1+7,"%d",temp); // convert ADC0 value into text print_lcd(1, TEXT1); // output TEXT to LCD Delay(20000); Smpl_ADC_Touch

28 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw // measuring Y-axis DrvADC_Open(ADC_SINGLE_END, ADC_SINGLE_CYCLE_OP, 0x2, INTERNAL_HCLK, 1); // ADC1 DrvGPIO_Open(E_GPA, 0, E_IO_OUTPUT); DrvGPIO_Open(E_GPA, 2, E_IO_OPENDRAIN); DrvGPIO_SetBit(E_GPA,0); DrvGPIO_ClrBit(E_GPA,2); DrvADC_StartConvert(); // start A/D conversion while(DrvADC_IsConversionDone()==FALSE); // wait till conversion is done temp = DrvADC_GetConversionData(1); DrvGPIO_Close(E_GPA,0); DrvGPIO_Close(E_GPA,2); DrvADC_Close(); temp = temp & 0x0ffc; sprintf(TEXT2+7,"%d",temp); // convert ADC1 value into text print_lcd(2, TEXT2); // output TEXT to LCD Delay(20000); } Smpl_ADC_Touch

29 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw References 參考資料 ► Analog-to-digital converter - Wikipedia, the free encyclopedia Analog-to-digital converter - Wikipedia, the free encyclopedia ► Flash ADC - Wikipedia, the free encyclopedia Flash ADC - Wikipedia, the free encyclopedia ► Understanding SAR ADCs: Their Architecture and Comparison with... Understanding SAR ADCs: Their Architecture and Comparison with... ► 淺談 Delta-Sigma 之工作原理 淺談 Delta-Sigma 之工作原理 ► TI High Speed Analog to Digital Converter BasicsHigh Speed Analog to Digital Converter Basics ► http://en.wikipedia.org/wiki/Delta-sigma_modulation http://en.wikipedia.org/wiki/Delta-sigma_modulation ► http://www.beis.de/Elektronik/DeltaSigma/DeltaSigma.html http://www.beis.de/Elektronik/DeltaSigma/DeltaSigma.html

30 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw DAC (Digital-to-Analog Converter) 數位類比轉換器 ► Binary-Weighted Resistor DAC ► R-2R Ladder DAC ► ΔΣ DAC (Sigma-Delta DAC) Binary-Weighted Resistor DAC R-2R DAC Vout = - (Vmsb + Vn + Vlsb) = - (Vref + Vref/2 + Vref/ 4) Sigma-Delta DAC

31 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw General Disclaimer The Lecture is strictly used for educational purpose. MAKES NO GUARANTEE OF VALIDITY ► The lecture cannot guarantee the validity of the information found here. The lecture may recently have been changed, vandalized or altered by someone whose opinion does not correspond with the state of knowledge in the relevant fields. Note that most other encyclopedias and reference works also have similar disclaimers.similar disclaimers No formal peer review ► The lecture is not uniformly peer reviewed; while readers may correct errors or engage in casual peer review, they have no legal duty to do so and thus all information read here is without any implied warranty of fitness for any purpose or use whatsoever. Even articles that have been vetted by informal peer review or featured article processes may later have been edited inappropriately, just before you view them.peer reviewfeatured article No contract; limited license ► Please make sure that you understand that the information provided here is being provided freely, and that no kind of agreement or contract is created between you and the owners or users of this site, the owners of the servers upon which it is housed, the individual Wikipedia contributors, any project administrators, sysops or anyone else who is in any way connected with this project or sister projects subject to your claims against them directly. You are being granted a limited license to copy anything from this site; it does not create or imply any contractual or extracontractual liability on the part of Wikipedia or any of its agents, members, organizers or other users. ► There is no agreement or understanding between you and the content provider regarding your use or modification of this information beyond the Creative Commons Attribution-Sharealike 3.0 Unported License (CC-BY-SA) and the GNU Free Documentation License (GFDL);Creative Commons Attribution-Sharealike 3.0 Unported License GNU Free Documentation License

32 Department of Electrical Engineering, National Taiwan Ocean University www.ee.ntou.edu.tw General Disclaimer Trademarks ► Any of the trademarks, service marks, collective marks, design rights or similar rights that are mentioned, used or cited in the lectures are the property of their respective owners. Their use here does not imply that you may use them for any purpose other than for the same or a similar informational use as contemplated by the original authors under the CC-BY- SA and GFDL licensing schemes. Unless otherwise stated, we are neither endorsed by nor affiliated with any of the holders of any such rights and as such we cannot grant any rights to use any otherwise protected materials. Your use of any such or similar incorporeal property is at your own risk. Personality rights ► The lecture may portray an identifiable person who is alive or deceased recently. The use of images of living or recently deceased individuals is, in some jurisdictions, restricted by laws pertaining to personality rights, independent from their copyright status. Before using these types of content, please ensure that you have the right to use it under the laws which apply in the circumstances of your intended use. You are solely responsible for ensuring that you do not infringe someone else's personality rights.personality rights


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