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C8051F020 DAC See chapter 8 of C8051F02x.pdfC8051F02x.pdf.

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Presentation on theme: "C8051F020 DAC See chapter 8 of C8051F02x.pdfC8051F02x.pdf."— Presentation transcript:

1 C8051F020 DAC See chapter 8 of C8051F02x.pdfC8051F02x.pdf

2 The C8051F020 contains two 12-bit DAC’s Output swing from 0V to VREF-1LSB Several possible sources for VREF Internal reference = 1.2 X 2 = 2.4 volts, AV+, external. Possible update sources: Update on write to high byte of DAC. (Default) Update on timer overflow. Position of 12 bits used can be varied.

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5 0 0 1 1 1 MOV REF0CN,#07H ;USE INTERNAL VREF

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7 1 0 0 0 0 0 MOV DAC0CN,#10000000B ;EN DAC0, UPDATE ON WR, LEFT JUSTIFIED

8 INIT_DACS: MOV REF0CN,#07H ;USE INTERNAL VREF MOV DAC0CN,#10000000B ;EN DAC0, UPDATE ON WR, LEFT JUSTIFIED MOV DAC1CN,#10000000B ;EN DAC1, UPDATE ON WR, LEFT JUSTIFIED RET WR_DAC0: MOV DAC0L,R7 ;OUTPUT LOW BYTE MOV DAC0H,R6 ;OUTPUT HIGH BYTE RET WR_DAC1: MOV DAC1L,R7 ;OUTPUT LOW BYTE MOV DAC1H,R6 ;OUTPUT HIGH BYTE RET

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15 MOV XBR0,#00000100B ;UART 0 TX TO P0.0, RX TO P0.1

16 MOV XBR1,#10000000B ;SYSCLK OUT

17 MOV XBR2,#01000000B ;ENABLE THE CROSSBAR


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