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R. KassIEEE05/Puerto Rico N37-3 1 Radiation-Hard Optical Link for the ATLAS Pixel Detector Richard Kass The Ohio State University W. Fernando, K.K. Gan,

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Presentation on theme: "R. KassIEEE05/Puerto Rico N37-3 1 Radiation-Hard Optical Link for the ATLAS Pixel Detector Richard Kass The Ohio State University W. Fernando, K.K. Gan,"— Presentation transcript:

1 R. KassIEEE05/Puerto Rico N37-3 1 Radiation-Hard Optical Link for the ATLAS Pixel Detector Richard Kass The Ohio State University W. Fernando, K.K. Gan, P. D. Jackson, M. Johnson, H. Kagan, R. Kass, A. Rahimi, C. Rush, S. Smith, R. Ter-Antonian The Ohio State University P. Buchholz, M. Holder, A. Roggenbuck, P. Schade, M. Ziolkowski Universitaet Siegen, Germany OUTLINE Introduction Proton irradiation results Opto-board production Summary

2 R. Kass IEEE05/Puerto Rico N37-3 2 The ATLAS Pixel Detector Inner most charged particle tracking Pixel size 50  m by 400  m ~100 million pixels Barrel layers at r = 5.1 - 12.3 cm Disks at z = 50 - 65 cm Dosage after 10 years: –optical link 17 Mrad or 3.7 x 10 14 1-MeV n eq /cm 2 disks barrel layers ~380mm ~1850mm

3 R. Kass IEEE05/Puerto Rico N37-3 3 ATLAS Pixel Opto-link VCSEL: Vertical Cavity Surface Emitting Laser diode VDC: VCSEL Driver Circuit PIN: PiN diode DORIC: Digital Optical Receiver Integrated Circuit Opto-board: Holds VDCs, DORICs, PINs, VCSELs Uses BeO as substrate

4 R. Kass IEEE05/Puerto Rico N37-3 4 Convert LVDS input signal into single-ended signal appropriate to drive the VCSEL diode l Output (bright) current: 0 to 20 mA, controlled by externally controllable current (I set ) l Standing (dim) current: ~ 1 mA for fast off-to-on switching of VCSEL l Rise & fall times: 1 ns nominal (40 MHz signals) Duty cycle: (50 ± 4)% l “On” voltage of VCSEL: up to 2.3 V at 20 mA for 2.5 V supply l Constant current consumption balanced between ON and OFF state Use IBM 0.25  m CMOS for radiation hardness l Use TRUELIGHT “high power oxide” common cathode VCSEL arrays VCSEL Driver Circuit Specs

5 R. Kass IEEE05/Puerto Rico N37-3 5 l Decode Bi-Phase Mark encoded (BPM) clock and command signals from PIN diode l Input signal size: 40  A - 1000  A l Extract 40 MHz clock l Duty cycle: (50 ± 4)% l Total timing error: < 1ns l Bit Error Rate (BER): < 10 -11 at end of life l Use Truelight common cathode PIN array l Use IBM 0.25 CMOS for radiation hardness Digital Optical Receiver IC Specs 40MHz clock Command BPM

6 R. Kass IEEE05/Puerto Rico N37-3 6 The Opto-board Optical signal  electrical signal conversion occurs here Contains 7 optical links, each link serving one Pixel module Fabricated in 2 flavors –Layer B: for inner barrel, two data link per module for high occupancy –Layer D: for outer barrel and disks Fabricated with BeO for heat management –initial prototypes with FR4 for fast turn around and cost saving Need: 44 B boards 226 D boards Opto-pack Housing Pin array DORIC VCSEL array VDC 2cm

7 R. Kass IEEE05/Puerto Rico N37-3 7 Opto-board Performance & Status Detailed measurements are done on all critical electrical and optical parameters to check performance/quality –LVDS rise/fall times, jitter…, –Optical power, optical rise/fall times, duty cycle… –The opto-boards meet or exceed all the pixel detector requirements spec. Optical power @ 10 mA significantly > 500  W spec Optical power spec. Minimum PIN current for No BIT Errors Minimum PIN current for no BIT errors significantly < 40  A spec

8 R. Kass IEEE05/Puerto Rico N37-3 8 Radiation Hardness Measurements Important to measure/certify radiation hardness of ASICs and opto-board and its components: –VCSEL and PIN arrays –VDC and DORIC chips –Encapsulant, fibers, glues, etc. Use CERN’s T7 beam (24 GeV Proton) for radiation hardness studies –“Cold box” setup: electrical testing of DORIC and VDC  Exposed up to 62 Mrad –Shuttle setup: testing of optical links on opto-boards using DORIC and VDC  Can be moved in and out of beam remotely for VCSEL annealing  Exposed up to 32 Mrad

9 R. Kass IEEE05/Puerto Rico N37-3 9 Real Time Monitoring in Beam Test Real time testing of opto-board system using loop-back setup data DORIC clock PIN VDC VCSEL Opto-board VDCVCSEL bi-phase marked optical signal decoded data decoded clock Signal routed back to opto-baord via test board attached to 80- pin connector Bit error test board l Compare transmitted and decoded data measure minimum PIN current for no bit errors l Measure optical power In control room 25 meter optical fiber cable In beam

10 R. Kass IEEE05/Puerto Rico N37-3 10 PIN Current Threshold vs Dosage PIN current thresholds for no bit errors remain constant spec 24 GeV protons @ CERN

11 R. Kass IEEE05/Puerto Rico N37-3 11 Optical Power vs. Dosage Irradiate ~5 Mrad/day (10 hours) with annealing rest of the day Optical power decreases with dosage as expected due to VCSELs Limited annealing recovers some lost power Still acceptable power after 30 Mrad Spec

12 R. Kass IEEE05/Puerto Rico N37-3 12 Opto-board Production Challenges l Rigorous QA procedure: u 72 hours of burn-in at 50 o C u 18 hours of 10 thermal cycles between -25 o C and 50 o C u 8 hours of optical and electrical measurements l Use 2 ovens and 2 environmental chambers l Implemented an “early shift” to extend the work day But no shifts on weekends. l Aggressive goals: u produce 10 boards/week  complete production in early October 2005

13 R. Kass IEEE05/Puerto Rico N37-3 13 l Initial plan was not to test chips before mounting on opto-board due to high yield during pre-production l A bunch of produced boards drew excessive current u thermal imaging showed power to ground shorts  test all chips before mounting on opto-boards Chip yield turned out to be ~98% Initial Production Problem VDCDORIC

14 R. Kass IEEE05/Puerto Rico N37-3 14 Opto-board Production Status l Relatively smooth production l Opto-board yield ~ 93% Production finished at OSU 80 MHz opto-boards 160 MHz opto-boards Recovered 18 opto-boards by stacking new chips on top of bad chips These re-worked boards passed the standard rigorous QA procedure Will use these boards as spares.

15 R. Kass IEEE05/Puerto Rico N37-3 15 Summary Opto-boards of ATLAS pixel detector satisfy design spec. and radiation hardness requirement: low PIN current thresholds for no bit errors excellent optical power radiation hard up to ~ 30 Mrad Simple & modular design allows smooth production opto-board production completed in seven months! For More Details see: ATLAS PIXEL OPTO-ELECTRONICS, K. E. Arms et al., Apr 2005. Submitted to NIM, e-Print Archive: physics/0504142

16 R. Kass IEEE05/Puerto Rico N37-3 16 Backup Slides

17 R. Kass N37-3 17 Setup for Irradiation in Shuttle at CERN Opto-boards Rad hard optical fibers 25 meter optical fiber Shuttle test electronics prior to shipping to CERN Remotely moves in/out of beam OSU CERN T7

18 R. Kass IEEE05/Puerto Rico N37-3 18 Proton Induced Bit Errors in PIN  Bit error rate decreases with PIN current as expected bit error rate ~ 3 x 10 -10 at 100  A (1.4 errors/minute)  DORIC spec: 10 -11 Convert observed bit errors into bit error rate at opto-link location:  SEU


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