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Advanced Embedded Systems Design Pre-emptive scheduler BAE 5030 Fall 2004 Roshani Jayasekara Biosystems and Agricultural Engineering Oklahoma State University.

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Presentation on theme: "Advanced Embedded Systems Design Pre-emptive scheduler BAE 5030 Fall 2004 Roshani Jayasekara Biosystems and Agricultural Engineering Oklahoma State University."— Presentation transcript:

1 Advanced Embedded Systems Design Pre-emptive scheduler BAE 5030 Fall 2004 Roshani Jayasekara Biosystems and Agricultural Engineering Oklahoma State University

2 Pre-emption In practice sequential operation is rare –eg: Simple infinite loop in the main() of a C program for an embedded system Even though it may appear to be sequential, this code is subject to interruption at any time by the hardware When peripheral’s interrupt occurs, the corresponding ISR starts to run instead of main() This process is called pre-emption As a result of pre-emption: –main() will execute slowly –Change of system state Nested interrupts –An ISR that interrupts the program could itself be interrupted by the ISR for a higher-priority interrupt As each pre-emption occurs: –The processor’s flags, pointer and other key registers must be saved (typically in RAM)

3 ISR While majority of embedded systems are required to run one program, they do need to run multiple tasks – eg: Read the input from ADC every 1ms, read one or more switches every 200ms and update an LCD display every 3ms For above example you can use three independent timers to perform three tasks [Listing 13.5, pond] Difficulties with hardware interrupts –If we have 100 tasks we need 100 timers –Hard to maintenance and update –Difficult to extend What is the solution? Scheduler

4 Schedulers What is a scheduler? –Simple operating system that allows tasks to be called periodically or one-shot basis Periodic tasks: to be performed periodically One-shot tasks: to be performed one after delay –Single timer interrupt service routing that is shared between many different tasks Advantages –Only one timer needs to be initialized –Any changes for the timing generally required only one function to be altered –Can use the same scheduler for many different tasks A similar technique can make a processor as responsive to software events as it is to hardware event –The goal is more or less to divide the software up into a set of individual event handlers called “tasks” –A pre-emptive schedulers makes this possible

5 Schedulers Different types of schedulers –The co-operative scheduler: single-tasking system –The pre-emptive scheduler: multitasking system –The hybrid scheduler: limited multitasking capabilities Scheduler typeTask executionDevice I/O Endless loopNo tasksPolled only Basic cyclic executiveAs often as possiblePolled only Time-driven cyclic executiveSingle frequencyPolled only Multi-rate cyclic executiveMultiple frequencyPolled only DeadlinePeriodic/non-periodicPolled and interrupt driven

6 Pre-emptive Schedulers A pre-emptive schedulers provide a multitasking system architecture The system can immediately suspend processing of the lower priority event and commence with the new event Operation: –Tasks are scheduled to run at specific time –When a task is scheduled to run it is added to the waiting list –The task is not a Run To Completion (RTC) model

7 Pre-emptive Scheduler Implementation: –Comparatively complicated eg: semaphores must be implement to avoid conflict when “concurrent” tasks attempts to access shared resources –The scheduler must allocate memory to hold all the intermediate states of pre-empted tasks –The scheduler will generally be written in Assembly language –The scheduler is created as a separate application

8 Pre-emptive schedulers Software task –Sequential function –Often ending with an infinite loop –Each task has specific job Reading sensor Updating a display Logging data –Each task has its own dedicated stack area in RAM

9 Task Control Task control must include information about each task: –Stating address –Relative priority –Amount of stack space Task body include other system calls related to software event or timing Task priority –Random –Rate Monotonic Algorithm (RMA)

10 Tradeoffs Less predictable and reliable –Multiple tasks are active at any point in time Memory cost –Extra ROM for the system calls plus RAM for task-specific stacks Tasks share resources –Race conditions –Priority inversion –Deadlock Expensive –Larger code framework –Less portable

11 Questions ?


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