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EEL-4746 Microprocessor-based System Design Fall 2004 Semester Dr. Michael P. Frank.

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Presentation on theme: "EEL-4746 Microprocessor-based System Design Fall 2004 Semester Dr. Michael P. Frank."— Presentation transcript:

1 EEL-4746 Microprocessor-based System Design Fall 2004 Semester Dr. Michael P. Frank

2 Announcements Announcements FSU First-Day Mandatory Attendance Policy ECE Course Prerequisite Policy ECE Academic Dishonesty Policy Today’s Agenda

3 EEL-4746 Course Outline and Objectives EEL-4746 Course Outline and Objectives EEL-4746 Best Practices EEL-4746 Best Practices EEL-4746 Software Distribution EEL-4746 Software Distribution Design Methodology Design Methodology Design Abstraction Design Abstraction EEL-4746 Microprocessor-based System Design EEL-4746 Microprocessor-based System Design Review of Digital Logic Design Review of Digital Logic Design

4 Course Outline and Objectives

5 4746 Best Practices Or, How do you get an A in this class?

6 Definition: System Design Process Requirements Specification ConceptualizationAnalysisSynthesisVerificationDocumentation Iteration

7 4746: System Design Process Requirements Specification Given by me: HW, Project, Exam, etc. Given by me: HW, Project, Exam, etc.Conceptualization Developed by you and your group Developed by you and your group Iteration Design Cycle Write Program Compile Program Debug Compilation Errors Examine output results Debug Logical Errors Examine hardware results Debug Hardware Errors Iteration

8 4746: System Design Process Documentation “Digitally dropped” into Blackboard Site “Digitally dropped” into Blackboard Site This could take one hour or thirty hours depending on your skills. I will help you avoid “landmines”

9 Homework Assignments Two weeks to complete an assignment No excuse for: network down, printer out of toner, computer locks up, etc. No excuse for: network down, printer out of toner, computer locks up, etc. HW assignments will “overlap” Average one assignment due every 1 ½ weeks. Average one assignment due every 1 ½ weeks. HW’s will build upon one another You may use solutions from previous HW’s You may use solutions from previous HW’s Homework assignments will be customized Solutions will be given for a “general” problem Solutions will be given for a “general” problem You must have working program for full credit

10 Homework Assignments HW’s are “self-correcting” for the “right answer”. I’ll check for the “correct” solution. I’ll check for the “correct” solution. HW must be on time Digital Drop Box (time stamped) Digital Drop Box (time stamped) Both you and your partner must digitally submit Both you and your partner must digitally submit Only one copy of handwritten notes needed. Only one copy of handwritten notes needed.

11 Design Projects Design projects DO NOT replace regular homework assignments. You may have both due during the same week. You may have both due during the same week. Hardware MUST work for more than ½ credit

12 Quizzes Designed to “keep you awake.” Designed to “keep you awake.” Mostly group quizzes Mostly group quizzes Some individual quizzes Some individual quizzes No make-up quizzes will be given Used to monitor attendance Used to monitor attendance I will drop the three lowest quiz grades I will drop the three lowest quiz grades

13 Course Notes All slides will be available online All slides will be available online Exam, HW, and Quiz solutions online Exam, HW, and Quiz solutions online

14 EEL-4746 Best Practices Keep up with the course!!! Complete the Assignments!!! You will be allowed to work in groups, but You will be allowed to work in groups, but

15 EEL-4746 Best Practices The only way to learn to code in Assembly Language is to code in Assembly Language.

16 In other words, practice makes perfect. EEL-4746 Best Practices

17 4746 Software Distribution

18 THRSIM11 MS Windows based 68HC11 simulator Text Editor Text Editor Cross Assembler Cross Assembler Disassembler Disassembler Software Simulator Software Simulator Simulate Hardware Target Board Downloader Target Board Downloader Target Board Terminal Interface Target Board Terminal Interface

19 THRSIM11 Site license for FAMU-FSU COE students Download program self-extracting archive from course webpage Under “Course Library” Under “Course Library” Request License File from ECE website Must make request from FAMU or FSU email domain. Must make request from FAMU or FSU email domain. Cannot give license file to another student! Cannot give license file to another student!

20 Design Methodology

21 Definition: Engineering Design Methodology A systematic approach to achieve the desired goal of a solution to the problem (i.e. a working design) using proven principles or practices. You must follow our 4746 design methodology to get full credit.

22 “Right Answers” Design Methodology “Best Practices Solution” Violates “Best Practices” “Right answer” but not correct solution.

23 Design Abstraction How do we “describe” a system?

24 Design Abstraction Example: Design a “system” which will complement input A A F(x) where A and Y are single bit values AY 01 10 We can “describe” this design using a logical Truth Table Y = A

25 Levels of Design Abstraction Our goal in ECE is physical or hardware implementations of the design. In ECE, we “design” at several levels of “abstraction” Design Specs a1 1 a2 2 3 a3 4 a4 b1 b2 b3 b4 5 6 7 8 Vcc1 0 GND 0 Hard- ware Design Process

26 Levels of Design Abstraction System Level: EEL-4746 (M68HC11) A ASM Code M68HC11 Assembly Language: COMA ; Complement A STAA Y ; Store Accumulator A at Y Example: Design a “system” which will complement input A Y = A

27 Levels of Design Abstraction Behavioral Level: EEL-4712 A Not A VHDL code: Y <= not A; Example: Design a “system” which will complement input A Y = A

28 Levels of Design Abstraction Gate Level: EEL-3705 Digital Logic Design A Inverter Symbol Example: Design a “system” which will complement input A Y = A

29 Levels of Design Abstraction Circuit Level: EEL-3300 Electronics I A CMOS Technology Example: Design a “system” which will complement input A PFET NFET Y = A

30 Levels of Design Abstraction Digital IC Design: EEL-4313 Digital IC Design A CMOS Technology Example: Design a “system” which will complement input A VDDGND Y = A

31 Levels of Design Abstraction Fabrication Level: EEL-4330 Microelectronics Eng

32 Summary of Levels “System”: Assembly Language Behavioral: VHDL Logical: Gates Electronic Circuit: Transistors Integrated Circuit: IC Layout Fabrication: IC Processing

33 Summary All “levels” give you the same result. We will learn how to use the “system” level to its highest degree of effectiveness.

34 EEL-4746 Microprocessor-based System Design Begin Actual Course Material

35 Basic Computer System CPU: Central Processor Unit I/O: Input/Output Memory: Program and Data Bus: Address signals, Control signals, and Data signals To I/O

36 Microprocessor-Based System Microprocessor e.g. Pentium 4 To I/O CPU: Central Processor Unit I/O: Input/Output Memory: Program and Data Bus: Address signals, Control signals, and Data signals

37 Microcontroller-Based System Microcontroller e.g. M68HC11 To I/O CPU: Central Processor Unit I/O: Input/Output Memory: Program and Data Bus: Address signals, Control signals, and Data signals (Although a microcontroller may access external memory as well.)

38 EEL-4746 M68HC11 Micro-controller Design We will learn to write M68HC11 Assembly Language Code


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