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6. The CPU and Memory Chapt. 7.

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Presentation on theme: "6. The CPU and Memory Chapt. 7."— Presentation transcript:

1 6. The CPU and Memory Chapt. 7

2 Introduction The Little Man Computer (LMC) is cute, but…
Real computers… Memory is separate from the CPU Data are in binary (not decimal) Central Processing Unit

3 Components of a CPU ALU (arithmetic and logic unit) Control unit
Perform arithmetic and logic operations Arithmetic: add, subtract, multiply, divide, etc. Logic: AND, OR, NOT, Shift, etc. Control unit Interprets instructions Controls the flow of information within the CPU Works with a “program counter” (address of next instruction) Input/output interface Provides mechanism for input and output of data Many variations possible p. 166

4 LMC Counterparts ALU Input/output interface Control unit
00 123 123 01 500 02 199 03 500 04 399 456 05 Control unit 95 96 97 98 789 99 123 05 Program counter p. 167

5 Input/output interface
System Block Diagram CPU Memory ALU Input/output interface Control unit Program counter

6 Registers A register is a single storage location within the CPU
Unlike memory, which is “outside” the CPU Examples of registers: Accumulator (ACC) Program counter (PC) Instruction register (IR) Memory address register (MAR) Memory data register (MDR) Status register General purpose registers (R0, R1, …) Included on some CPUs Used for high-speed temporary storage of program variables

7 Memory address register
Memory Unit n bits Memory cell bit 0 1 2 3 4 2n-1 bit 1 Memory address register Address decoder bit n - 1 m - 1 Memory data register m bits p. 170

8 Memory Capacity 2n x m n address bits = 2n addresses m data bits
m is the “width” of the data path Typical values: n: 16, 17, 18, 19, 20, 21, 22, etc. m: 8, 16, 32, 64

9 Question Q: How many bits of memory are contained in a memory unit with 512KB of memory? A: 512 = 29, K = 210, B = byte = 8 = 23 29 x 210 x 23 = 222 = 4,194,304

10 Exercise – Memory Capacity
Q: How many bits of memory are contained in a memory unit with 2MB of memory? A: Skip answer Answer

11 Exercise – Memory Capacity
Answer Q: How many bits of memory are contained in a memory unit with 2MB of memory? A: 2 = 21, M = 220, B = byte = 8 = 23 21 x 220 x 23 = 224 = 16,777,216

12 Memory Implementations
RAM – random access memory Static RAM Dynamic RAM ROM – read-only memory p. 175

13 Fetch-Execute Cycle Two steps, or cycles, in the execution of every instruction Fetch – fetch the code for the instruction from memory and place it in the IR (instruction register) Execute – execute the instruction A pretty picture sometimes helps… Fetch Execute time

14 The Store Instruction PC  MAR MDR  IR Fetch IR[address]  MAR
A  MDR PC + 1  PC Fetch time Execute

15 The Add Instruction PC  MAR MDR  IR Fetch IR[address]  MAR
A + MDR  A PC + 1  PC Fetch time Execute

16 From our first lecture…
Buses Definition: a collection of wires with a common purpose Each wire is called a line Typically, buses carry information from one place to another From our first lecture…

17 bus Ports Printer Mouse Keyboard Modem Disk controller Graphics card Monitor Speakers CPU Sound card RAM Network card Computer

18 Types of Buses (1 of 3) Point-to-point Serial port Modem Control unit
ALU

19 Types of Buses (2 of 3) Multipoint Computer Computer Computer Computer
CPU Memory Disk controller Video controller

20 Types of Buses (3 of 3) Daisy chain Device controller Device Device
Terminator

21 Buses Inside a Computer
Motherboard Many configurations possible CPU Data bus Address bus Control bus Memory I/O Module I/O Device

22 Data Bus Carries data between the CPU and memory or I/O devices
Bi-directional Data transferred “out of” the CPU for write operations Data transferred “into” the CPU for read operations Typical sizes: 8, 16, 32, 64 lines Signal names: D0, D1, D2, D3, etc.

23 Address Bus Carries an address from the CPU to Memory or I/O devices
Unidirectional The address is always supplied by the CPU (There is one exception to this, which we’ll discuss later.) Typical sizes: 16, 20, 24 lines Signal names: A0, A1, A2, A3, etc.

24 Control Bus Collection of signals for coordinating CPU activities
Each signal has a unique purpose Typical sizes: lines Signals are output, input, or bi-directional Typical signals /RD (read) /WR (write CLK (clock) /IRQ (interrupt request) etc.

25 Memory Maps The usage of memory space on a system is commonly depicted in a “memory map” The height of the map is determined by the number of addresses The width of the map is usually 8 bits E.g., a system with a capacity of 216 bytes…

26 Memory Map Data bit position The “bottom” of memory
FFFF 0002 0001 0000 Data bit position The “bottom” of memory Hexadecimal address

27 Use of Memory Maps Memory maps are usually drawn to show “what is where” on a system The possibilities for “what” RAM, ROM, I/O, nothing The possibilities for “where” Determined by the starting/ending addresses for each “block” of RAM, ROM, I/O, nothing E.g., a memory map for a system with a capacity of 224 bytes with two 1 MB RAM modules residing consecutively at the bottom of memory…

28 Memory Map 14 MB empty 224 bytes = 16 MB “capacity” 1 MB RAM 1 MB RAM
FFFFFF 200000 1FFFFF 100000 0FFFFF 000000 14 MB empty 224 bytes = 16 MB “capacity” 1 MB RAM 1 MB RAM

29 Exercise – Memory Space
Q: A system with a memory capacity of 128 GB has four 32 MB memory modules installed consecutively at the bottom of memory. The rest of the memory is unused. How much memory space is available for future expansion? (Give your answer in decimal in megabytes.) A: ? Skip answer Answer

30 Exercise – Memory Space
Answer Q: A system with a memory capacity of 128 GB has four 32 MB memory modules installed. The rest of the memory is unused. How much memory space is available for future expansion? (Give your answer in decimal in megabytes.) A: 128 GB – 4 x 32 MB = 27 x 210 MB - 22 x 25 MB = (217 – 27) MB = (131,072 – 128) MB = 130,944 MB

31 Exercise – Memory Maps Draw a memory map for a system with a capacity of 2 GB. Assume the system has three 32 MB memory modules residing consecutively at the bottom of memory. Illustrate the size of each block in MB and the starting and ending address of each block of memory in hexadecimal. Skip answer Answer

32 Memory Map 1,952 MB empty 231 bytes = 2 GB “capacity” 32 MB RAM
Answer Memory Map 7FFFFFFF 05FFFFFF 03FFFFFF 01FFFFFF 1,952 MB empty 231 bytes = 2 GB “capacity” 32 MB RAM 32 MB RAM Note: 2 GB = 2,048 MB 32 MB RAM

33 Memory vs. I/O Our system block diagram shows memory and I/O connected to the same buses (data, address, & control) This raises the question… How is I/O differentiated from memory? (We’ll answer this in the next topic)

34 Thank you


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