1. Higher Computing Computer Systems S. McCrossan 1 Higher Grade Computing Studies 2. Computer Structure Computer Structure The traditional diagram of a computer... CONTROL UNIT ALU REGISTERS RAM ROMROM INPUT DEVICES keyboard + mouse etc. OUTPUT DEVICES monitor + printer etc. BACKING STORAGE CPU MAIN MEMORY

2. Higher Computing Computer Systems S. McCrossan 2 Higher Grade Computing Studies 2. Computer Structure The Structure of the CPU - The Control Unit The control unit is like the CPU’s manager. The main functions of the control unit are: To send out the signals to fetch instructions from memory. To interpret those instructions. To send out signals to enable instructions to be carried out.

3. Higher Computing Computer Systems S. McCrossan 3 Higher Grade Computing Studies 2. Computer Structure The Structure of the CPU - The ALU The arithmetic and logic unit, the ALU, performs the following functions; Calculations such as addition, subtraction, multiplication and division. Logic functions, such as comparing values.

4. Higher Computing Computer Systems S. McCrossan 4 Higher Grade Computing Studies 2. Computer Structure Main Memory The main memory part can be visualised as a series of individual boxes with their own unique address.

5. Higher Computing Computer Systems S. McCrossan 5 Higher Grade Computing Studies 2. Computer Structure The Size & Number of Memory Locations The word length of a computer is the size of the data, in bits, which can be manipulated as a single unit by the processor. Logically, it is also the number of bits that a single memory location can store. The size is determined by the width of the data pathways (or buses) within the computer, between the processor and the memory. The system above has a word length of 16 bits.

6. Higher Computing Computer Systems S. McCrossan 6 Higher Grade Computing Studies 2. Computer Structure Main Memory RAM has the following features: The CPU can write to, or read from, RAM at high speed. RAM can be changed by the CPU at any time - it is volatile. All information stored in RAM is lost when the computer is switched off. Static RAM holds its contents as long as there is a power supply. Dynamic RAM, has to be refreshed by reading and rewriting its contents frequently. DRAM is more common because it needs less power and its circuitry is simpler.

7. Higher Computing Computer Systems S. McCrossan 7 Higher Grade Computing Studies 2. Computer Structure Main Memory ROM has the following features: The bootstrap loader is stored in ROM. Data in ROM can be read by the CPU from the moment the computer is switched on. Data in ROM is permanently written into a microchip. Data stored in ROM is not lost when the computer is turned off.

8. Higher Computing Computer Systems S. McCrossan 8 Higher Grade Computing Studies 2. Computer Structure Main Memory PROM (Programmable Read Only Memory) Empty of data when the chip is manufactured, can be programmed by the user. Once programmed the data cannot be erased. EPROM (Erasable PROM) Like PROM only the chip can be removed from the computer and the program erased and another stored in its place using ultraviolet light. EEPROM (Erasable PROM) Like EPROM but electricity is used to erase and reprogram selected contents.

9. Higher Computing Computer Systems S. McCrossan 9 Higher Grade Computing Studies 2. Computer Structure Storage Outside Main Memory Reading /writing data to and from memory can slow down the system performance. To combat this problem, the processor can store data in cache memory or its internal registers instead of the RAM. Cache memory small amount of memory e.g. 512 KB. stores the next instructions to be read. physically closer to the processor than RAM. uses static memory (SRAM).

10. Higher Computing Computer Systems S. McCrossan 10 Higher Grade Computing Studies 2. Computer Structure Storage in the CPU - Registers Registers are temporary storage locations in the processor. A register can be used for tasks like ; holding data for a calculation. storing the address of the next instruction to be executed. holding the instruction as it is being decoded and executed. We will look at registers in more detail in the Fetch-Execute cycle.

11. Higher Computing Computer Systems S. McCrossan 11 Higher Grade Computing Studies 2. Computer Structure The Processor and Main Memory ALU Control Unit Other registers Memory Address Register Memory Data Register Main Memory Address 00001101 00001100 00001011 00001010 00001001 00001000 00000111 00000110 00000101 00000100 00000011 00000010 00000001 00000000 Processor Address bus 32 lines Data bus 16 lines Control bus 6 lines

12. Higher Computing Computer Systems S. McCrossan 12 Higher Grade Computing Studies 2. Computer Structure Buses A bus is an electronic highway or a collection of cables where each cable can transmit one bit. There are three buses: The address bus, which is used by the processor to pinpoint the memory location, needed. This is a one-way bus. The data bus, which is used to transfer the data. Its size will usually match the word size i.e. the size of the memory locations. This is a two-way bus. The control bus, which is used to initiate and control what is happening.

13. Higher Computing Computer Systems S. McCrossan 13 Higher Grade Computing Studies 2. Computer Structure The Address Bus information is carried from the processor to the main memory this informs the main memory which memory location will be read or used to store data. the number of wires in this bus determines the number of memory locations. each wire on the bus carries one bit of information at a time. 8 lines will allow 256 memory locations. 32 lines will allow 68,719,476,736 memory locations. increasing the width of this bus, increases the number of memory locations that it is possible to address. Memory Address Register Address bus Main Memory Address 00001101 00001100 00001011 00001010 00001001 00001000 00000111 00000110 00000101 00000100 00000011 00000010 00000001 00000000 0001000 Processor

14. Higher Computing Computer Systems S. McCrossan 14 Higher Grade Computing Studies 2. Computer Structure The Data Bus information is carried to and from the processor and main memory. this stores data in a memory location and reads data from a memory location. the description of the computer i.e 32 bit computer, informs the user of the number of wires in this bus. each wire on the bus carries one bit of information at a time. increasing the width of this bus, increases the quantity of data that can be carried at one time and so increases the performance of the computer system. Memory Data Register Data bus Main Memory Address 00001101 00001100 00001011 00001010 00001001 00001000 00000111 00000110 00000101 00000100 00000011 00000010 00000001 00000000 11100101 Processor

15. Higher Computing Computer Systems S. McCrossan 15 Higher Grade Computing Studies 2. Computer Structure The Control Bus each wire on the bus has its own separate function and is activated independently of the others. Read Informs the memory that data is to be sent to the processor from a particular memory location. Write Informs the memory that data is to be stored in a particular memory location. Clock Generates a constant pulse which regulates the flow of information. A clock of 600MHz (megahertz) generates a pulse 600,000,000 times a second. Control Unit Control bus Main Memory Address 00001101 00001100 00001011 00001010 00001001 00001000 00000111 00000110 00000101 00000100 00000011 00000010 00000001 00000000 Processor

16. Higher Computing Computer Systems S. McCrossan 16 Higher Grade Computing Studies 2. Computer Structure The Control Bus Interrupt This is a signal informs the processor that some important external activity has taken place. The current state of processing is saved, then the processor deals with the interrupting device, it then returns to the previous state when finished with the interrupt request. Reset Clears all internal processor registers and returns the computer to its initial switched on state. Control Unit Control bus Main Memory Address 00001101 00001100 00001011 00001010 00001001 00001000 00000111 00000110 00000101 00000100 00000011 00000010 00000001 00000000 Processor NMI The Non-Maskable Interrupt operates like an interrupt but it cannot be ignored. It must be dealt with immediately.

17. Higher Computing Computer Systems S. McCrossan 17 Higher Grade Computing Studies 2. Computer Structure The Links Between Processor and Memory The Stored Program concept: The program and data are stored in RAM until needed by the processor. The first instruction is fetched from memory into the processor where it is decoded and executed. The same happens to the second instruction and so on until the program ends. The FETCH-EXECUTE cycle: The processor has to be able to pinpoint any memory location in which instructions or data are stored. Each memory location is assigned an unique address.

18. Higher Computing Computer Systems S. McCrossan 18 Higher Grade Computing Studies 2. Computer Structure Read From Memory A processor needs an instruction from memory or requires some data to perform a calculation. Here are the steps and buses needed to fetch that information from memory. 1. Processor sets up address bus with the address to be read in memory in the MAR 2. Processor activates the read line on the control bus 3. Data from the memory is copied onto the data bus and transferred into the MDR This pinpoints the desired location This tells the memory a ‘read’ is to occur and the memory finds the requested location Data is transferred to the processor

19. Higher Computing Computer Systems S. McCrossan 19 Higher Grade Computing Studies 2. Computer Structure Write To Memory Here are the steps and buses needed to write information to memory. 1. Processor sets up address bus with the address of the location to be written to in the MAR 3. Processor activates the write line on the control bus 4. Data from the processor is copied onto the data bus and into memory This pinpoints the desired location This tells the memory a ‘write’ is to occur and the memory finds the requested location Data is transferred to the memory 2. Processor sets up data bus with the data to be written to memory into the MDR This prepares the data