1. GUI for Computer Architecture Simulation Technical Problem Currently there are tools to aid in the study of computer architecture, but they lack a flexible graphical user interface (GUI). The goal of this project is to develop a GUI for existing micro-architecture simulation software, such as Verilog or SimpleScalar, to enhance the design and learning process for students in CprE 305 at Iowa State. Team May01-05 Neil HansenBenjamin Jones Jon MathewsSergey Sannikov Abstract The study of computer architecture is a challenging field because of the high degree of complexity involved in any computer system. Simulation tools have been developed to ease this complexity, allowing architectures to be developed, modified, and compared. However, these tools lack a flexible graphical user interface to help visualize the internal operation of the architecture. This has motivated the need for software that will provide an interactive display that shows the computer instructions as they are processed by the computer architecture. This software will be an effective tool for students and researchers alike because it will allow them to see the execution of actual assembly programs. It is expected that the first use of the software will be for teaching computer architecture courses at Iowa State University. Design Objectives Develop a GUI for a computer architecture simulator that: Shows the internal process of instruction execution Supplements coursework in CprE 305 Is simple to use and understand End-Product Description The product is a GUI educational tool for students and researchers studying micro-architecture. It animates the execution of MIPS instruction set assembly programs cycle by cycle. This helps users to visualize the internal process of instruction execution in the architecture by showing the details of each instruction as it progresses from stage to stage. Technical Approaches The problem can be decomposed into three distinct components as shown in Figure 1: Micro-architecture simulator: modifying an existing simulator to conform to the specification presented in [1] Translator: for translating the simulation output to a form that is readable by the GUI software GUI software: Animating the internal process of the program execution, showing the datapath and control signals Testing Approaches System test Evaluation test by graduate students and faculty: - provide feedback on the effectiveness of the tool - suitability as a presentation tool User test by students currently taking CprE 305 to provide feedback on the usability of the tool Budget and Personnel Effort The total estimated cost will be $50 and the total estimated personnel effort will be 670 hours. References [1] J. Hennessy and D. Patterson. Computer Organization and Design: The Hardware/Software Interface. Morgan Kaufmann Publishers Inc., San Francisco, CA. 1998. Operating Environment and Intended Users The software will run in computer labs at Iowa State University or on a home computer, either as stand-alone software or over the web. It is intended to be an educational tool to assist in visualizing micro-architecture. The users will be primarily: Students learning computer architecture Instructors who use the software as a presentation tool for teaching Assumptions and Limitations The initial micro-architecture will be limited to the MIPS architecture modeled in [1] Users will be at least in part familiar with the MIPS instruction set Initial programs will be class examples less than 60 MIPS instructions long The simulator will be either Verilog or SimpleScalar Screen size will limit the effective display of information Clients/Advisors Dr. Arun Somani Dr. Manimaran Govindarasu Functional Requirements Layers – allows selection of amount of data displayed (registers, control signals) Play and fast forward buttons – step through the animation by one or multiple cycles Micro-architecture display – the visual representation of the micro-architecture Display of currently executing assembly instructions color coded by stage Measurable Milestones Simulator modification Simulation output translator GUI software Integration of tool components User evaluation and revision http://seniord.ee.iastate.edu/may0105 Assembly Code Micro-architecture Simulation Translated Simulation Output Graphical User Interface Figure 1. System overview. Translator Simulator