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October 8, 2014CLBv2, Vidyo Peter Jansweijer Nikhef Amsterdam Electronics- Technology KM3NeT CLBv2 1.

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Presentation on theme: "October 8, 2014CLBv2, Vidyo Peter Jansweijer Nikhef Amsterdam Electronics- Technology KM3NeT CLBv2 1."— Presentation transcript:

1 October 8, 2014CLBv2, Vidyo Peter Jansweijer Nikhef Amsterdam Electronics- Technology KM3NeT CLBv2 1

2 October 8, 2014CLBv2, Vidyo Peter Jansweijer Nikhef Amsterdam Electronics- Technology ICAPE2 2 Configuration User Guide UG470 chapters 5-7 => Crappie!UG470 Figure 7-2 of Virtex-5 Configuration User Guide UG191 gave a hint to toggle signal CSIBUG191 This (and some extra Type-1 NO OP ’s at strategic points) helped! Now Multiboot can read/write the ICAPE2 registers! For verification: Contacted Xilinx Field Application Engineer to see if there is better documentation for 7 Series. IMPACT: Trigger Re-Configuration:

3 October 8, 2014CLBv2, Vidyo Peter Jansweijer Nikhef Amsterdam Electronics- Technology 8 th WR workshop (@CERN) 3 http://www.ohwr.org/projects/white-rabbit/wiki/Oct2014Meeting

4 October 8, 2014CLBv2, Vidyo Peter Jansweijer Nikhef Amsterdam Electronics- Technology 8 th WR workshop (@CERN) Only attended Monday due to private circumstances. Revived contacts with CERN, GSI and 7-Solutions White Rabbit friends Monday Highlights: ◦ Talked to Greg Daniluk and Erik v.d. Bij: review ep_tx_framer (try to attack accidental crashes; seen also by all other groups) ◦ Restart synchronization problems seen by more groups (HiScore, GSI) and put under the attention. ◦ LHAASO group:  outstanding work on temperature compensation and stability.  reports that 1.2 V FPGA power noise impacts stability (is this why our CLB does worse with respect to SPEC? ◦ Pause Frame implementation knowledge transfer. (7-Solutions -> Greg) ◦ Met our ICE-Cube friends, who are going to use WR as well! 4

5 October 8, 2014CLBv2, Vidyo Peter Jansweijer Nikhef Amsterdam Electronics- Technology Collaboration Meeting 5 I will not be in Paris. The agenda (as last time in Leiden) brings the same story 4 times (Bologna, Valencia, Genova, Amsterdam) => wastes 2 hours * ~80 participants = 160 manhours! Why not one electronics presentation; the one Diego already shows at the Steering Committee? => Since the Steering Committee already knows => everybody already knows => so to my opinion the collaboration meeting is a waste of time… Therefor my plan is to spend the time more sensible!

6 October 8, 2014CLBv2, Vidyo Peter Jansweijer Nikhef Amsterdam Electronics- Technology Todo list 6 Fix State Machine, TDC, AES and MCH (David, Antonio, me) Re-arrange MCH channel (proper time-tag; not lagging one time-slice => me) Flow-Control study: ◦ Fix Slow Control => thoroughly test yesterdays solution ◦ define system level actions when frontends overflow ICAPE2 / multiboot / watchdog / golden image tests Software: Communication interface between LM32_2 nd and LM32_WR ◦ SFP readout and setting (loopback, PRBS, wavelength tuning) ◦ Auto negotiation control Ethernet flow control (received pause frame implementation in the CLB)

7 October 8, 2014CLBv2, Vidyo Peter Jansweijer Nikhef Amsterdam Electronics- Technology Backup slides 7


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