1. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 1 GLAST Large Area Telescope Gamma-ray Large Area Space Telescope Electrical, Electronic, and Electromechanical (EEE) Parts Nick Virmani Naval Research Lab, Washington DC nvirmani@swales.com 202-767-3455

2. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 2 EEE Parts Selection Criteria Parts screening and qualification per GSFC-311-INST-001 level 2, superceded by EEE-INST-002, and LAT EEE Parts Program Control Plan LAT-MD-00099-1. Manufacturer’s process control and construction, policies on qualification, reliability process monitor, requalification, screening. Certification of manufacturing and assembly (Surface Mount and MCM Assembly) processes to be compatible with parts. Thermal profile of reflow equipment and process control. Parts Control Board (PCB) approval of all parts, procedures, specifications along with procurement controls and documentation Electrical testing of parts and board assemblies for extended temperature range. Derating of all parts as per PPL-21. Parts stress analysis for each board assembly prior to flight assembly. GIDEP search and review of parts from selection until launch.

3. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 3 EEE Parts Challenges New technology parts never used in space application such as the 3.3 volt ADC, DAC, Polyswitch Fuses, ASICs, MCMs Nanoconnectors, etc. ASICs (system on chip) with million channels. Plastic Encapsulated Microcircuits (PEMs) Wide range of parts. The risk is a key issue in the decision making process. All subsystem managers, engineers, GSFC, and parts control board (PCB) have to agree for radiation, testing, screening, and qualification issues. Tight budget.

4. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 4 EEE Parts Status ACD Front End Electronics Board – all parts approved except ASICs and MAX494 OpAmps ASICs testing procedure and plan to be prepared and to be approved by PCB. High Voltage Bias Supply (HVBS) Board – all parts approved except high voltage capacitor, inductors, etc. Plans are in process for approval of all parts. Resistor Tap Network Board – no issues CAL Front End Electronics Board – all parts approved except MAX145 & MAX5121. Test flows approved by GSFC PCB, LAT-SS-01878. Test set-up is in process to be reviewed and approved by PCB. ASICs – Flight design to be finalized. Test flows, LAT-SS-01879 approved by GSFC. Other specifications and procedures are in process. Photodiode Assembly – All parts approved. Qualification will start by the first week of June 2003.

5. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 5 EEE Parts Status DAQ General part list for the selection of parts submitted. 90% of the parts have been approved. Allocation of the parts to each board design (PDU, SIU, AEM, GASU, EPU) is in process and to be reviewed by PCB. ASICs – flight design to be finalized. Test flows LAT-SS-01879 approved by GSFC PCB. Other specifications and procedures are in process are to be reviewed and approved by PCB. RAD750 – part list approval based on other GSFC program. TKR MCM - ASIC wafer testing in process. Procedure for MCM chip-on-board assembly, testing, wire bonding, MCM mounting, integration and in- process controls to be submitted to PCB for approval. Polyfuse – GSFC approved screening & qualification specification and preliminary testing results show no concern. Waiting for flight material. Flex Cable – flex cable design under revision. Specification will be revised. No manufacturing and qualification issues. Cristek connector qualification report being requested from Vendor.

6. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 6 Radiation Testing Status ACD – MAX494 under testing at GSFC. ASICs will be tested when parts available no other issues. CAL – Voltage reference, MAX145, and MAX5121 will be tested at Brookhaven Lab in June 2003. Tests coordinated with GSFC Radiation Branch Code 561. ASICs will be tested when parts available. DAQ – General parts lists are under review by GSFC radiation branch code 561. ASIC radiation test plan under review by GSFC. ASICs will be tested when available. TKR – SEE testing of ASICs will be done at Legnaro (IT). In addition, two Tracker ASIC MCMs will be SEE tested at TAMU for comparison of data. All LAT ASIC designs have a common gate library and architecture. If the results at TAMU and Legnaro are comparable, the remaining ASIC type will not be tested at TAMU. CAL – Photodiode testing and crystal testing is in process.

7. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 7 EEE Part Derating and Part Stress Analysis Status ACD Derating and part stress analysis is in process CAL Derating and part stress analysis is complete TKR Derating and part stress analysis is complete DAQ Derating and part stress analysis will be performed after selection of parts for SIU, PDU, GASU, EPU, RAD750 and power supply. Our goal is to complete derating and part stress analysis prior to flight board fabrication

8. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 8 Process Flow Chart for ASICs Wafer/Die Packaging WAFERS RECEIVE FROM MOSIS USING AGILENT PROCESS INSPECTION WAFER MOUNT PROCEDURE WAFER SAW PROCEDURE WAFFLE PACK DIES AND SHIP TO ASAT RECEIVING INSPECTION AT ASAT DIE ATTACH ADHESION CONTROL MONITORS LEAD FRAME SELECTION DIE ATTACH CURE WIREBONDWIREBOND MONITOR OPTICAL INSPECTION DIE ATTACH MONITOR MOLDING Scanning Electron Microscope (SEM) Inspection per MIL-STD-883 LAT Released Procurement Document To be performed at GSFC

9. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 9 Process Flow Chart for Packaging of ASICs Molding Compound Selection Molding Molding Monitor Post Mold Cure Trim Monitor Mark Monitor Mark CurePlating Plating Monitor Strip Visual Trays / Tubes Form Monitor Final Inspection QA Buy-off Lead Scan Dry Bake Final Visual Examination InspectionPack Packing Material Ship to testing facility for testing CSAM 20 pcs. from lot Decision for acceptance

10. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 10 ASICs Screening Flow in Parallel to PreQual/Qual and Radiation Testing Prepare test fixtures for dynamic burn-in, prepare test programs and verify the functionality of burn-in boards for screening of parts and submit burn-in diagram for approval to PCB 100% Thermal cycle -40  C to 125  C (20 cycles) unpowered 85 parts if more than 500 total, 52 parts if less than 500 for Pre- Qualification/Qualification Select 10% minimum or 200 pieces, whichever is greater, from the total lot for screening and qualification. DPA 5 samples of each type. Receiving Inspection for ID and damage Dynamic Burn-in for 168 hours at 85  C but do not exceed junction temp of 125  C. Burn-in procedures to be approved by the PCB Perform 100% electrical, functional, and parametric measurement at three temperatures i.e., room temp. +25  C, high +85  C, and low temp. -30  C. 1 5 6B 4 7 8 9 The balance qty of ASIC parts are to be stored in N2 purged bags and containers. 4A CSAM decision to be made after review of Qual data from page 8 10% parts or min. 200 pcs. whichever is greater 4B 10 pcs. of each type for SEE RAD Testing 6C Packaged ASIC parts External Visual Inspection as per MIL-STD- 883, 100% 3 Decision by PCB, if electrical tests to be performed on balance quantity. 6A Perform electrical testing at room temp. on 10% of parts or 200 pcs. minimum, whichever is greater. 6 Serialization Balance quantity to be used for screening 6D 100% electrical, functional, and parametric measurements at room temp. +25  C 2 4C4D

11. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 11 ASICs Screening Flow in Parallel to PreQual/Qual and Radiation Testing Verify integrity of bare PWB as per GSFC S-312-P-003, prepare reflow profile, run test boards after assembly as per NASA-STD-8739.2, prepare detailed procedures, certify selected vendor, verify functionality of sample assembled board, submit all procedures to PCB for approval, and conduct flight mount review. Software and procedure to be configuration controlled and all anomalies as recorded Assemble flight boards using proven, approved, and configuration controlled documents as defined in block 13. Mandatory inspection points during assembly to be defined by PCB 100% Visual Inspection of assembled boards as per NASA-STD-8739.2 for surface mount assemblies 100% electrical verification of flight board at room temp. using configuration controlled and approved test program as per procedure approved by PCB Bake parts from block 4A only if any of the bags have been opened 13 14 15 16 17 Parts Control Board (PCB) to make decision to use the balance parts (block 4A & 4B) after reviewing test data. 11 Review TID results and if parts are acceptable, bake parts from block 9 and ship the screened parts to ACD and DAQ and store balance quantity in nitrogen purge bags to be used for rework, see block 22. 12 CSAM (optional) Decision will be made after review of Pre- Qual/Qual Data. See block 4A and 4C for quantity. 10 Select 10 samples of each type for total dose testing under bias. 11A

12. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 12 ASICs Screening Flow in Parallel to PreQual/Qual and Radiation Testing Conformal coat assembled and tested boards Perform 100% electrical testing using the configuration controlled test program Store flight boards in nitrogen purge storage Obtain approval of PCB Flight boards ready for integration Present all data to Parts Control Board (PCB) Perform 100% electrical testing using configuration controlled test program after rework at room temperature 25  C, high temp.+85  C and low temp. -30  C 23 – Reworked and Spare Boards 24 25 26 272829 Review results, calculate deviations in the electrical parameters from the previous tests 100% Visual Inspection as per NASA-STD- 8739.2 Rework and replace boards, if any, using the screened parts from block 12. All rework and replacement of parts to be recorded. Number of rework and replacement parts to be decided by PCB. 2021 22 (Rework If Required) 100% Electrical test at -30  C with continuous monitoring using configuration control test program 19 100% Dynamic burn-in (flight assembled boards) at 85  C for 168 hours with continuous monitoring using configuration controlled test program. Procedures to be approved by PCB 18

13. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 13 ASIC Pre-Qual/Qual Flow Radiography 100% Divide into 3 sub-lots SMT Simulation 100% CSAM 100% 100% Electrical Testing at room temp. 25C, high +85  C, & low - 30  C HAST 100 hours at 130  C 20 pcs. from lot of 85 or 15 pcs. from lot of 52 CSAM 100% Unpowered Temperature Cycling 200 cycles (-55  C to 125  C), 1 cycle / hour, 20 pcs. from lot of 85 or 15 pcs. from lot of 52 Life test at 125  C 45 pcs. from lot of 85 or 22 pcs. from lot of 52 CSAM 100% 100% Electrical functional and parametric measurement at room temp 25  C, high +85  C & low -30  C Examination of Data CSAM 100% Examination of Data Interim Electrical Measurement after 160 hrs at room temp. 25  C. Examination of Data 85 parts if lot is more than 500 pcs. or 52 parts if less than 500. Block 6B after electrical test. Report 100% Electrical functional and parametric measurement at room temp 25  C, high +85  C & low -30  C Report Q1 Q2 Q3Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 Q15 Q16 Q17 Q18 Q19 Q20 Q21 Q22 PCB Review Q23

14. GLAST LAT ProjectCDR/CD-3 Review May 12-16, 2003 Document: LAT-PR-01967Section 16 EEE Parts 14 Summary & Risk Mitigation  LAT engineers team involvement on PCB with GSFC parts and radiation branch personnel.  Manage risk by adding process controls, manufacturing assurance, screening, and qualification.  Select standard pre-qualified parts where possible.  Store, handle, and assemble parts using well qualified procedures.  Check board assembly manufacturing process for all parts for compatibility.  Use previous mission lessons learned database  Use of well qualified personnel  All above plans are in process and risks are being managed continuously.  Parts plan is in good shape.