1. Basic Computer Organization, CPU L1 Prof. Sin-Min Lee Department of Computer Science

9. currently the fastest, most powerful CPU are Intel Pentium III processor

36. In the first phase of the cycle, the processor fetches an instruction from memory. The address of the instruction to fetch is stored in an internal register named the program counter, or PC. As the processor is waiting for the memory to respond with the instruction, it increments the PC. This means the fetch phase of the next cycle will fetch the instruction in the next sequential location in memory (unless the PC is modified by a later phase of the cycle).

37. 1. ACCUMULATOR(ACC). The accumulator size matches that of the memory word because data is transferred from memory to the accumulator and from the accumulator to memory. The CPU has the capability to add and subtract values from the value stored in the accumulator.

38. 2.PROGRAM COUNTER(PC) This register holds the memory address of the next instruction to be executed by the processor. 3.INSTRUCTION REGISTER (IR) The instruction register holds the instruction currently being executed by the processor. The IR is broken into two parts: the left-most digit is an instruction code, or OP CODE, while the right 2 digits are (usually) interpreted as a memory address. 4.CONDITION CODE REGISTER (CC) This register holds one digit (actually either a 0 or a 1). This register is used to store a value based on the comparison of two numeric values: the CC has value 0 (zero) if the compared values are NOT equal and value 1 if the values are equal.

39. Decode phase In the decode phase the processor stores the information returned by the memory in another internal register, known as the instruction register, or IR. The IR now holds a single machine instruction, encoded as a binary number. The processor decodes the value in the IR in order to figure out which operations to perform in the next stage.

40. In the execution stage the processor actually carries out the instruction. This step often requires further memory operations; for example, the instruction may direct the processor to fetch two operands from memory, add them, and store the result in a third location (the addresses of the operands and the result are also encoded as part of the instruction).