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Digital Integrated Circuits A Design Perspective
EE141 Digital Integrated Circuits A Design Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic The Devices July 30, 2002
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Goal of this chapter Present intuitive understanding of device operation Introduction of basic device equations Introduction of models for manual analysis Introduction of models for SPICE simulation Analysis of secondary and deep-sub-micron effects Future trends
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The Diode Mostly occurring as parasitic element in Digital ICs n p B A
SiO 2 Al Cross-section of pn -junction in an IC process One-dimensional representation diode symbol Mostly occurring as parasitic element in Digital ICs
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Depletion Region
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Diode Current
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Forward Bias Typically avoided in Digital ICs
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Reverse Bias The Dominant Operation Mode
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Models for Manual Analysis
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Junction Capacitance
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Diffusion Capacitance
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Secondary Effects Avalanche Breakdown 0.1 ) A ( I –0.1 –25.0 –15.0
I D –0.1 –25.0 –15.0 –5.0 5.0 V (V) D Avalanche Breakdown
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Diode Model
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SPICE Parameters
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What is a Transistor? A Switch! |V GS | An MOS Transistor
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The MOS Transistor Polysilicon Aluminum
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MOS Transistors - Types and Symbols
G G S S NMOS Enhancement NMOS Depletion D D G G B S S NMOS with PMOS Enhancement Bulk Contact
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Threshold Voltage: Concept
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The Threshold Voltage
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The Body Effect
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Current-Voltage Relations A good ol’ transistor
0.5 1 1.5 2 2.5 3 4 5 6 x 10 -4 V DS (V) I D (A) VGS= 2.5 V VGS= 2.0 V VGS= 1.5 V VGS= 1.0 V Resistive Saturation VDS = VGS - VT Quadratic Relationship
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Transistor in Linear
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Transistor in Saturation
Pinch-off
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Current-Voltage Relations Long-Channel Device
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A model for manual analysis
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Current-Voltage Relations The Deep-Submicron Era
-4 V DS (V) 0.5 1 1.5 2 2.5 x 10 I D (A) VGS= 2.5 V VGS= 2.0 V VGS= 1.5 V VGS= 1.0 V Early Saturation Linear Relationship
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Velocity Saturation u ( m / s ) u = 10 x = 1.5 x (V/µm) 5 sat n c
Constant velocity Constant mobility (slope = µ) x c = 1.5 x (V/µm)
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Perspective I V Long-channel device V = V Short-channel device V V - V
GS DD Short-channel device V V - V V DSAT GS T DS
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ID versus VGS linear quadratic quadratic Long Channel Short Channel
0.5 1 1.5 2 2.5 3 4 5 6 x 10 -4 V GS (V) I D (A) 0.5 1 1.5 2 2.5 x 10 -4 V GS (V) I D (A) linear quadratic quadratic Long Channel Short Channel
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ID versus VDS Resistive Saturation VDS = VGS - VT Long Channel
0.5 1 1.5 2 2.5 3 4 5 6 x 10 -4 V DS (V) I D (A) VGS= 2.5 V VGS= 2.0 V VGS= 1.5 V VGS= 1.0 V Resistive Saturation VDS = VGS - VT -4 V DS (V) 0.5 1 1.5 2 2.5 x 10 I D (A) VGS= 2.5 V VGS= 2.0 V VGS= 1.5 V VGS= 1.0 V Long Channel Short Channel
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A unified model for manual analysis
G B
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Simple Model versus SPICE
0.5 1 1.5 2 2.5 x 10 -4 Velocity Saturated Linear Saturated VDSAT=VGT VDS=VDSAT VDS=VGT (A) I D V (V) DS
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A PMOS Transistor Assume all variables negative! -2.5 -2 -1.5 -1 -0.5
-0.8 -0.6 -0.4 -0.2 x 10 -4 V DS (V) I D (A) VGS = -1.0V VGS = -1.5V VGS = -2.0V Assume all variables negative! VGS = -2.5V
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Transistor Model for Manual Analysis
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The Transistor as a Switch
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The Transistor as a Switch
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The Transistor as a Switch
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MOS Capacitances Dynamic Behavior
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Dynamic Behavior of MOS Transistor
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The Gate Capacitance x L Polysilicon gate Top view Gate-bulk overlap
d L Polysilicon gate Top view Gate-bulk overlap Source n + Drain W t ox n + Cross section L Gate oxide
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Gate Capacitance Cut-off Resistive Saturation Most important regions in digital design: saturation and cut-off
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Gate Capacitance Capacitance as a function of VGS
(with VDS = 0) Capacitance as a function of the degree of saturation
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Measuring the Gate Cap
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Diffusion Capacitance
Channel-stop implant N 1 A Side wall Source W N D Bottom x Side wall j Channel L S Substrate N A
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Junction Capacitance
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Linearizing the Junction Capacitance
Replace non-linear capacitance by large-signal equivalent linear capacitance which displaces equal charge over voltage swing of interest
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Capacitances in 0.25 mm CMOS process
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The Sub-Micron MOS Transistor
Threshold Variations Subthreshold Conduction Parasitic Resistances
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Threshold Variations V V Low V threshold Long-channel threshold VDS L
Threshold as a function of Drain-induced barrier lowering the length (for low V ) (for low L ) DS
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Sub-Threshold Conduction
0.5 1 1.5 2 2.5 10 -12 -10 -8 -6 -4 -2 V GS (V) I D (A) VT Linear Exponential Quadratic The Slope Factor S is DVGS for ID2/ID1 =10 Typical values for S: mV/decade
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Sub-Threshold ID vs VGS
VDS from 0 to 0.5V
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Sub-Threshold ID vs VDS
VGS from 0 to 0.3V
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Summary of MOSFET Operating Regions
Strong Inversion VGS > VT Linear (Resistive) VDS < VDSAT Saturated (Constant Current) VDS VDSAT Weak Inversion (Sub-Threshold) VGS VT Exponential in VGS with linear VDS dependence
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Parasitic Resistances
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Latch-up
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Future Perspectives 25 nm FINFET MOS transistor
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