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Minimization Techniques for Reversible Logic Synthesis.

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Presentation on theme: "Minimization Techniques for Reversible Logic Synthesis."— Presentation transcript:

1 Minimization Techniques for Reversible Logic Synthesis

2 Reversible Logic SynthesisSlide 2 Outline Why reversible logic? The building blocks The synthesis problem Some solutions Optimization Finding identities Remaining problems

3 Reversible Logic SynthesisSlide 3 Reversible Logic from the output you can determine the input (bijection) Why would we want this? Landauer's principle: every bit of information lost consumes energy k is the Boltzman constant T is the temperature energy loss is small inputs outputs circuit network

4 Reversible Logic SynthesisSlide 4 Applications Quantum Computing –necessarily reversible Low power CMOS –In adiabatic circuits, current is restricted to flow across devices with low voltage drop and the energy stored on their capacitors is recycled Optical Computing Nano-technologies –Billiard Ball Model (BBM)

5 Reversible Logic SynthesisSlide 5 Standard Gates which ones are reversible? and not xor or Embedding a non-reversible function into a reversible one How many ways?

6 Reversible Logic SynthesisSlide 6 Reversible Gates Feynman gate (controlled not) Toffoli gate x x  y y x y xy  z z y xx Generalized Toffoli gate  more control lines

7 Reversible Logic SynthesisSlide 7 Reversible Gates Fredkin gate (controlled swap) y zx’ + yx z yx’ + zx xx Generalized Fredkin gate  more control lines

8 Reversible Logic SynthesisSlide 8 Restrictions No fan-out No back-feeds

9 Reversible Logic SynthesisSlide 9 Restrictions No fan-out No back-feeds Cascade of Gates inputs output g1g1 g2g2 gigi g i+1 g n-1 gngn ……

10 Reversible Logic SynthesisSlide 10 Function Representation How do we represent a reversible function? –truth table –BDDs Is there an easy check to see that the function is reversible?

11 Reversible Logic SynthesisSlide 11 Synthesis Given a reversible function find a network of gates that realize the function Cost should be near minimal Possible cost assumptions: –Each gate has the same cost –The cost of each gate reflects its actual implementation cost

12 Reversible Logic SynthesisSlide 12 Approach 1 inputs outputs Reversible transformation

13 Reversible Logic SynthesisSlide 13 Approach 1 inputs outputs Reversible Transformation T1 inputsoutputs Reversible Transformation T2 GATEGATE

14 Reversible Logic SynthesisSlide 14 Conditions T2 should be “simpler” than T1 How do you measure simplicity? –Hamming distance –Spectral techniques Questions: –Will it converge? –How good is the result? Improvements –Look ahead –Backtracking

15 Reversible Logic SynthesisSlide 15 Approach 2 InputOutput 000 001 010100 011 100111 101 110010 111110

16 Reversible Logic SynthesisSlide 16 Approach 2 InputOutput 000 001 010100 011 100111 101 110010 111110 These are correct

17 Reversible Logic SynthesisSlide 17 Approach 2 InputOutput 000 001 010100100 011 100111 101 110010 111110 These are correct Step 1: move up 100 to 110

18 Reversible Logic SynthesisSlide 18 Approach 2 InputOutput 000 001 010100100 011 100111 101 110010 111110 These are correct Step 1: move up 100 to 110 a b c a b c

19 Reversible Logic SynthesisSlide 19 Approach 2 InputOutput 000 001 010100100 011 100111 101 110010 111110 These are correct Step 1: move up 100 to 110 a b c a b c

20 Reversible Logic SynthesisSlide 20 Approach 2 InputOutput 000 001 010100100 011 100111 101 110010 111110 These are correct Step 1: move up 100 to 110 a b c a b c InputOutput 000 001 010110110 011 100101 111 110010 111100

21 Reversible Logic SynthesisSlide 21 Approach 2 These are correct Step 2: move down 110 to 010 InputOutput 000 001 010110 011 100101 111 110010 111100

22 Reversible Logic SynthesisSlide 22 Approach 2 These are correct Step 2: move down 110 to 010 a b c a b c InputOutput 000 001 010110 011 100101 111 110010 111100

23 Reversible Logic SynthesisSlide 23 Approach 2 These are correct Step 2: move down 110 to 010 a b c a b c InputOutput 000 001 010110 011 100101 111 110010 111100 InputOutput 000 001 010 011111 100101 011 110 111100

24 Reversible Logic SynthesisSlide 24 Approach 2 Step 2: move down 110 to 010 a b c a b c InputOutput 000 001 010110 011 100101 111 110010 111100 InputOutput 000 001 010 011111 100101 011 110 111100

25 Reversible Logic SynthesisSlide 25 Approach 2 InputOutput 000 001 010 011111 100101 011 110 111100

26 Reversible Logic SynthesisSlide 26 Approach 2 c b a c b a InputOutput 000 001 010 011111 100101 011 110 111100

27 Reversible Logic SynthesisSlide 27 Advantages/Disadvantages Always converges Fast No look ahead Several optimizations are possible May not be optimal Worst case?

28 Reversible Logic SynthesisSlide 28 Approach 3 Local transformation Replace a sequence of gates with another For example replace 3 gates with 2

29 Reversible Logic SynthesisSlide 29

30 Reversible Logic SynthesisSlide 30 Approach 3 Use Identity circuits for local transformations inputs identity g1g1 g2g2 gigi g i+1 g n-1 gngn ……

31 Reversible Logic SynthesisSlide 31 Approach 3 inputs identity g1g1 g2g2 gigi g i+1 g n-1 gngn …… F(X)F -1 (X)

32 Reversible Logic SynthesisSlide 32 Approach 3 inputs identity g1g1 g2g2 gigi g i+1 g n-1 gngn …… F(X)F -1 (X) Replace this sequence of gates

33 Reversible Logic SynthesisSlide 33 Approach 3 inputs identity g1g1 g2g2 gigi g i+1 g n-1 gngn …… F(X)F -1 (X) Replace this sequence of gates with this sequence of gates

34 Reversible Logic SynthesisSlide 34 Template Description As a class - an identity that is not reducible by another template A template may be rotated A template may be applied in reverse order Size 2 ==> Duplicate gates (may be deleted) Size 3 ==> There are none Size 4 ==> Passing rule

35 Reversible Logic SynthesisSlide 35 Template Class — Size 5 A line may be removed A line may be duplicated

36 Reversible Logic SynthesisSlide 36 How many classes of identities are there? SizeIdentities Classes 10 21 30 42 51 63 72 816 956

37 Reversible Logic SynthesisSlide 37 The Templates: Application

38 Reversible Logic SynthesisSlide 38 The quest for identities Exhaustive searches are not feasible A feasible approach (to find size n identities): –Find all functions of size n/2 With limited number of lines With some canonical order –Pair each function with its inverse –If no reduction is possible ==> we found a new template

39 Reversible Logic SynthesisSlide 39 A new approach Start with an identity that has target lines only For any subset of gates that preserve the identity a new control line may be added Example:

40 Reversible Logic SynthesisSlide 40 Recent Advances Automatic template encoding Application of iterative minimization heuristics Progress in calculating “real quantum cost” –Using gates NOT, CNOT, V, and V+ –Quantum templates Using SAT to find exact results

41 Reversible Logic SynthesisSlide 41 Future Work Handling don’t cares (can be done with SAT) Billiard ball implementation of reversible circuits (via cellular arrays) Better representation for reversible functions –Truth table is not adequate –Some form of BDD (possibly Davio) Minimization with aid of group theory


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