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10/11/05ELEC 5970-001/6970-001 Lecture 121 ELEC 5970-001/6970-001(Fall 2005) Special Topics in Electrical Engineering Low-Power Design of Electronic Circuits.

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1 10/11/05ELEC 5970-001/6970-001 Lecture 121 ELEC 5970-001/6970-001(Fall 2005) Special Topics in Electrical Engineering Low-Power Design of Electronic Circuits Power Analysis: Probability Waveform Vishwani D. Agrawal James J. Danaher Professor Department of Electrical and Computer Engineering Auburn University http://www.eng.auburn.edu/~vagrawal vagrawal@eng.auburn.edu

2 10/11/05ELEC 5970-001/6970-001 Lecture 122 Digital Signal Waveforms time Transient region Clock period Primary Inputs Gate Outputs

3 10/11/05ELEC 5970-001/6970-001 Lecture 123 Transient Events 2 4 6 1 1 3 5 3 1 0 0 0 2 2 Path P1 P2 P3

4 10/11/05ELEC 5970-001/6970-001 Lecture 124 Probability Waveform Input vector applied Next input vector applied Vector period Transient interval 0 Steady state Samples of signal, s(t) 0 Prob. waveform, P(t) 1.0 P(t)=0.25 P(t) =0.25 0.25 0.5 0.25 0.5 0.25 0.5 Transition probabilities time

5 10/11/05ELEC 5970-001/6970-001 Lecture 125 Probability Simulation 1 3 1 2 001100110011 000111000111 010101010101

6 10/11/05ELEC 5970-001/6970-001 Lecture 126 Primary Input Pattern Analysis PI bit streamp1p0p01p10 010101010101…0.5 0.50 001100110011…0.5 0.25 000111000111…0.5 0.167

7 10/11/05ELEC 5970-001/6970-001 Lecture 127 PI Waveforms 0 1 2 3 4 5 6 T time 0.5 time 0.5 time 0.5 PI 1 PI 2 PI 3 0 1 2 3 4 5 6 T

8 10/11/05ELEC 5970-001/6970-001 Lecture 128 Probability Simulation 2 time 0.5 time 0.5 PI 2 PI 3 0 1 2 3 4 5 6 T time 0.75 0 1 2 3 4 5 6 T 0.2085 0.25 0.167

9 10/11/05ELEC 5970-001/6970-001 Lecture 129 Probability Simulation 1 3 1 0 1 2 3 4 5 6 T 0.5 PI 1 time 0.75 0 1 2 3 4 5 6 T 0.2085 0.25 0 1 2 3 4 5 6 T 0.2085 0.375 0 1 2 3 4 5 6 T 0.375 0.10425 0.5

10 10/11/05ELEC 5970-001/6970-001 Lecture 1210 Probability Simulation 1 0.25 0 1 2 3 4 5 6 T 0.2085 0.375 0 1 2 3 4 5 6 T 0.375 0.10425 0.53125 0 1 2 3 4 5 6 T 0.28125 0.0781875 0.1303125

11 10/11/05ELEC 5970-001/6970-001 Lecture 1211 Power Consumption of a Gate An input change can multiple transitions at the output of a gate. Per vector power consumed by a gate = CV 2 Σ p01(ti) ti ε [0,T]

12 10/11/05ELEC 5970-001/6970-001 Lecture 1212 Methods Related to Probability Waveform Tagged probability simulation (TPS): Four waveforms corresponding to steady states, 00, 01,10 and 11, are explicitly simulated. Dual-transition simulation (Dual-Trans): An improvement of TPS that considers pairs of consecutive transitions and gate delay to filter glitches. Further improvement is possible with supergate analysis to account for signal correlation.

13 10/11/05ELEC 5970-001/6970-001 Lecture 1213 References F. Najm, R. Burch, P. Yang and I. Hajj, “CREST – A Current Estimator for CMOS Circuits,” Proc. IEEE Int. Conf. on CAD, Nov. 1988, pp. 204-207. C.-S. Ding, et al., “Gate-Level Power Estimation using Tagged Probabilistic Simulation,” IEEE Trans. on CAD, vol. 17, no. 11, pp. 1099-1107, Nov. 1998. F. Hu and V. D. Agrawal, “Dual-Transition Glitch Filtering in Probabilistic Waveform Power Estimation,” Proc. IEEE Great Lakes Symp. VLSI, Apr. 2005, pp. 357-360. F. Hu and V. D. Agrawal, “ Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis,” Proc. IEEE Int. Conf. Computer Design, Oct. 2005. pp. 366-369.

14 10/11/05ELEC 5970-001/6970-001 Lecture 1214 Power Estimation by Prob. Waveform Circuit TPSDualTransSupergate method E avg σE tot E avg σE tot E avg σE tot c172.32.60.12.32.60.12.32.6 0.1 c43229.938.835.89.511.86.511.516.611.5 c4996.814.07.03.68.20.62.33.0 c8808.315.31.68.015.75.24.89.0 0.0 c135524.231.632.95.811.25.45.09.5 0.5 c190815.023.14.117.727.911.27.016.3 2.0 c267016.629.87.216.728.39.913.223.6 6.2 c354013.826.39.810.325.62.410.526.4 3.7 c531511.824.42.313.431.510.111.327.0 3.4 c628827.427.532.115.718.84.112.715.4 0.2 c755214.527.53.214.831.47.814.127.6 1.3 Avg.15.523.712.410.719.45.78.616.1 2.9

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