1. 1 8-Bit Binary-to-Gray Code Converter Mike Wong Scott Echols Advisor: Dave Parent May 11, 2005

2. 2 Agenda Abstract Introduction –Why –Simple Theory –Back Ground information Summary of Results Project (Experimental) Details Results Cost Analysis Conclusions

3. 3 Abstract 8-Bit Gray Code Converter –Operates at 200 MHz –Uses 5.65 mW of Power –Occupies an area of 346x154  m 2

4. 4 Introduction To convert a series of 8 binary numbers into Gray Code. Used in digital communication. When counting, only one bit is changed. –Effect of error minimized. Uses the basic principles learned in EE166.

5. 5 Introduction Truth Table: # BinaryGray Code 3 rd bit2 nd bit1 st bitBit XBit YBit Z 0000000 1001001 2010011 3011010 4100110 5101111 6110101 7111100 Bit A Bit B XOR 000 011 101 110 XOR Logic

6. 6 Longest Path Calculations Note: All widths are in microns and capacitances in fF

7. 7 Schematic

8. 8 Layout

9. 9 Verification

10. 10 Simulations

11. 11 Cost Analysis Time spent on each phase of the project –verifying logic – 1 week –verifying timing – 1 week –layout – 2 weeks –post extracted timing – 1 day

12. 12 Lessons Learned Use DRC often for the layout. Consult with Dr. Parent when needed. Start early and don’t procrastinate. Smaller groups are easier to manage.

13. 13 Summary Incorporated many of the principles taught in EE166. Designed a circuit that converts binary coded numbers to the Gray Code. Implemented logic design into layout form of CMOS technology.

14. 14 Acknowledgements Thanks to: –Cadence Design Systems for the VLSI lab –Synopsys for Software donation. –Professor Parent.