1. 1 5-bit Flash Encoder Nam Van Do, Dave Flores, Shawn Smith Advisor: Dr. David Parent December 6, 2004

2. 2 Agenda Abstract Introduction –Why –Simple Theory –Background information (Literature Review) Summary of Results Project (Experimental) Details Results Conclusions

3. 3 Abstract 5-bit Flash Encoder Clock speed: 200 MHz Average Power: 1.215 mW Average Power Density: 6.14 W/cm 2 Area: 90.30  m x 219.00  m

4. 4 Introduction Flash Encoder to be used in ADC/DAC IP for future DSP SOC projects Encodes 31 inputs into a 5-bit binary number

5. 5 Previous Work 2003 Gonzalez, Yu & Korbes. 6-bit Analog to Digital / Digital to Analog Converter. 2004 Fatimah, Bhagavan, Desikachari, Veena Jain. Encoding Logic for 5 bit Analog to Digital Converter. 1986 Peetz, Hamilton, Kang. An 8-bit 250 Megasample per Second Analog-to-Digital Converter: Operation Without a Sample and Hold. IEEE Journal of Solid-State Circuits.

6. 6 Project Summary Same encoding scheme as last year’s project with these improvements: –31 inputs to eliminate overflow indication –reduction in area –reduction in power

7. 7 Project Details Flash (no input flip-flops) –Faster clock frequency –Less area Benefits over fat-tree encoding scheme: –More benign results for invalid states –Less gates

8. 8 Project Details Encoding consists of two stages: –AOI stage For n = 1 to 7: B[n] = {C[n] & (!C[n+8])} OR {C[n+16] & (!C[n+24])} For n = 8: B[8] = {C[8] & (!C[16])} OR C[24]

9. 9 Project Details Encoding consists of two stages: –XOR stage Bit 0 =(B1 XOR B2) OR (B3 XOR B4) OR (B5 XOR B6) OR (B7 XOR B8) Bit 1 = (B2 XOR B4) OR (B6 XOR B8) Bit 2 = (B4 XOR B8) Bit 3 = B8 Bit 4 = C16

10. 10 Longest Path Calculations  PHL = 5ns / 13 = 0.38 ns

11. 11 Schematic

12. 12 Layout

13. 13 Verification

14. 14 Verification

15. 15 Simulations

16. 16 Simulations

17. 17 Simulations

18. 18 Simulations

19. 19 Cost Analysis Estimate of time spent on each phase of the project –verifying logic: 5 hours –verifying timing: 10 hours –layout: 40 hours –post extracted timing: 5 hours

20. 20 Lessons Learned Start early. Play with the tools even before working on your own design. Think modularly. Think about the design in terms of blocks and routing early to avoid problems later.

21. 21 Summary Our project exposed us to various aspects of IC design. –Analyzing various logic implementations. –Routing difficulties in combining components. 5-bit Flash Encoder was a success. Our encoder should fit nicely into future DSP SOC projects.

22. 22 Acknowledgements Thanks to Steve and Dan for the expert advice. Thanks to Cadence Design Systems for the VLSI lab. Thanks to Synopsys for Software donation. Professor Parent for his guidance.