1. המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory הטכניון - מכון טכנולוגי לישראל הפקולטה להנדסת חשמל Technion - Israel institute of technology department of Electrical Engineering Final presentation: Optical Stimulation System for Brain Waves Detection & Measurements Presenters: Alterman Igal : 306403650 Minkin Dmitry: 320576473 Supervised by: Broodney Hen. Winter Semester 2002 - 2003

2. SHORT DESCRIPTION Our project deals with measuring eye vision of the patient without the necessity of his cooperation. A patient is receiving optical stimulation and his brain waves are being collected by Sampling card (Brain wave collector device). While stimulation, our system generates a signal to synchronize between stimulation moment and Sampling card.

3. SYNCHRONIZER

4. SOLUTION Software prototype. Hardware prototype OUR SYSTEM Video card with 2 outputs & a screen splitter VHDL code for controlling pulse width Editing software code Integration GUI and Software for controlling stimulation. Pulse synchronizer

5. Sampling system Out 1 Video Card Out2 BLOCK DIAGRAM Operator Display / Sampling card program. step 1 pic 2 Stimulation Pulse Sync. Multiplexer Splitter

6. It was decided to use: Two-port Video Card: first port to stimulation, and the second to splitter. Splitter: - first output to patient display - second output to the Pulse Sync. Remark: why not to use 2 video cards?

7. Software implementation Graphical User Interface: using VB - choose parameters and set pulse length Run-time module : drawing and flipping pictures through DirectDraw (with normal priority).

8. Hardware implementation Output signal through hardware, based on [R,G,B,Vsync] signals. Hardware consists of analog (comparators etc.) and digital (Altera) circuits.

9. Integration Before every set of steps we declare in VBasic: “ Start program! ” “ Pulse length! ” “ Start flipping! ” After every set of steps we declare: “ Stop flipping! ” During flipping: “ Picture 1 ” “ Picture 2 ”

10. “ Start program! ” : A blank screen with 3 lines - complementary of green (red+blue) - complementary of red (green+blue) - white. Complementary colors were used in order to separate two phases of the process: Program start and encoding pulse length Flipping pictures White color was used in order to distinguish two consecutive colors.

11. “ Pulse length! ” : Retrieving pulse length (integer) from the user (GUI). Convert pulse length (in usec) to number of clocks, and then translate into a set of bits. Sending each bit – lsb first: “ 0 ” – complementary of red line. “ 1 ” – complementary of blue line.

12. “ Start flipping! ” : Complementary of green line. “ Stop flipping! ” : Green line. All lines are being read by hardware and treated appropriately. “ Flipping! ” : “ Picture 1 ” + red line “ Picture 2 ” + blue line

13. SCHEME CLK Vcc input Array of Comparators ALTERA MAX7000s BUFFER Picture changed? Set pulse width … IBM 3174 Sampling Card BNC IBM PS/2 PC R G B Vs 0 – 1.4 V 5V Pulse length 3.3 V Pulse length 5 V

14. Altera simplified structure : ALTERA MAX7000s Picture changed? Set pulse width … To Sampling card Pulse generator Trigger Pulse length [bits] Shift reg. (saving pulse length) Bit Insert RGBRGB Vsync FFX Signal shaper State Machine

15. FFX This unit is designed to solve the metastability problem This problem occurs when introducing an asynchronous signal into a digital (synchronized) system, using Flip-Flops. The most common way to tolerate metastability is to add one or more successive synchronizing flip- flops.

16. Altera simplified structure : ALTERA MAX7000s Picture changed? Set pulse width … To Sampling card Pulse generator Trigger Pulse length [bits] Shift reg. (saving pulse length) Bit Insert RGBRGB Vsync FFX Signal shaper State Machine

17. Signal shaper The purpose of this unit is to distinguish "pure" (not mixed) colors. Whenever a pure color (only red, green or blue) is given – then the appropriate output (red, green or blue) is set to "1“ Sig. Sh. Red + Blue (0,0,0) Sig. Sh. Red (1,0,0) - Otherwise, all outputs are "0". This component is implemented by a truth table.

18. Altera simplified structure : ALTERA MAX7000s Picture changed? Set pulse width … To Sampling card Pulse generator Trigger Pulse length [bits] Shift reg. (saving pulse length) Bit Insert RGBRGB Vsync FFX Signal shaper State Machine

19. Idle Reset ~Green – ~Red – White Ready to read pulse length ~Red Bit<=0; Insert = ‘ 1 ’ ; Bit<=0; Bit<=1; Insert = ‘ 1 ’ ; ~Blue Bit<=0; Start flipping ~Green Red Input: Red – R Green – G Blue – B Vsync ~Red – complimentary of R ~Green – complimentary of G ~Blue – complimentary of B Output: Insert Trigger Bit Bit<=0; Got Blue Trigger pulse White Bit<=0; Got Red Trigger pulse Bit<=0; Was Vsync Bit<=0; Was Vsync Bit<=0; Got Blue Bit<=0; Got Red Blue Idle Finished to read pulse length ~Green Vsync Red Blue Vsync Blue Red Blue Green

20. Altera simplified structure : ALTERA MAX7000s Picture changed? Set pulse width … To Sampling card Pulse generator Trigger Pulse length [bits] Shift reg. (saving pulse length) Bit Insert RGBRGB Vsync FFX Signal shaper State Machine

21. Shift register This unit stores and forms Pulse length Its inputs are given by the state machine Pulse generator This unit outputs Pulse according to Pulse length data. Output occurs when triggered by the state machine. 01010101010101010101 Pulse Length Pulse generator Trigger Pulse length

22. Integration problems Metastability, occurs when asynchronous inputs are involved. Inputs that arrived exactly when the clock has risen, cause the state machine to be in an undefined state, and therefore to act unpredictably. The Altera interface (Max Plus II) declares “success” even though the “burning” process didn’t really take place.

23. Vsync has opposite polarity at 2 outputs of the video card. The same screen may be redrawn several times – new Vsync edge ≠> new input signals. The state machine can ’ t distinguish 2 identical consecutive lines. A malfunction of one of the components causes push-back.

24. TECHNICAL SPECIFICATIONS 21 inch monitor Matrox Millennium Dual Head 550. Video splitter. Brain wave collector device with appropriate pc-card. DirectX 8.x SDK installed on the computer. 5V DC Power Supply.