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1 GPS Waypoint Navigation Team M-2: Charles Norman (M2-1) Julio Segundo (M2-2) Nan Li (M2-3) Shanshan Ma (M2-4) Design Manager: Zack Menegakis Presentation.

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Presentation on theme: "1 GPS Waypoint Navigation Team M-2: Charles Norman (M2-1) Julio Segundo (M2-2) Nan Li (M2-3) Shanshan Ma (M2-4) Design Manager: Zack Menegakis Presentation."— Presentation transcript:

1 1 GPS Waypoint Navigation Team M-2: Charles Norman (M2-1) Julio Segundo (M2-2) Nan Li (M2-3) Shanshan Ma (M2-4) Design Manager: Zack Menegakis Presentation 8: Functional Block Simulation March 27, 2006 Overall Project Objective: Design a low-power chip that navigates an aircraft to pre- determined waypoints.

2 2 Status Design Proposal Design Proposal Architecture Proposal Architecture Proposal Size Estimates / Floorplan Size Estimates / Floorplan Schematic Design Schematic Design Cell Analysis Cell Analysis Power Estimates at Targeted Clock Speeds Power Estimates at Targeted Clock Speeds Top-level simulated Top-level simulated Critical Path Estimates Critical Path Estimates  Layout Basic Gates Basic Gates Registers Registers Adders Adders  Major Functional Blocks (50% done)  Everything Else  Simulations

3 3 Design Decisions  Layout rules  Bit Slice most of the major modules  Reconsider SRAM  Revoke everyone’s delete permission  Go home when ipod battery dies

4 4 Layout Rules  Metal directionality: –Metal 1 & 2 any direction (local) –Metal 3 horizontal (high level) –Metal 4 vertical (high level)  Height: –6.3 um –Allows 4 path including contact points to run through

5 5 30 bit Register (old) data clk out

6 6 30 bit Register (new)

7 7 2048Hz Clock Divider

8 8 Angle Comparator

9 9 SRAM  We want it for… –Less transistor/area –Less work  Problem: –Consuming 56% of total power –300~400uW per column, 84 columns  What we have tried: –Clock gating –Take out precharge

10 10 SRAM Column

11 11 SRAM Cell

12 12 Floorplan Inputs Blackbox Outputs

13 13 Cell Analysis Functional Component Recent Count Area (µm²) Power FSM2722,0001.02nW SRAM (old) 3,988 3,98814,190? Registers/Buffers Clock / Counter Logic Done Logic 6,2101,91254829,78010,0122,0809.8uW-- Speed Comparator Altitude Comparator Angle Comparator Waypoint Comparator Heading2564121,2463,6963,4561,0451,6535,04014,76014,268902pW1.42nW4.71nW225.4uW15.59nW Distance Calculator Speed Calculator 3,4281,62615,6966,04211.12nW5.82nW Total27,050116,566-

14 14 What’s Next… Here’s what’s on our agenda for next week…  SRAM  Finish layout for major functional block  Simulation  Start global wiring

15 15 Questions???


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