1. 8/19/04ELEC 5970-003/6970-0031 ELEC 5970-003/6970-003 Advanced Topics in Electrical Engineering Designing VLSI for Low-Power and Self-Test Fall 2004 Vishwani D. Agrawal James J. Danaher Professor Department of Electrical and Computer Engineering Auburn University http://www.eng.auburn.edu/~vagrawal vagrawal@eng.auburn.edu

2. 8/19/04ELEC 5970-003/6970-0032 Course Objective Low-power design and self-test are two of the current needs in VLSI design. Learn basic concepts Gain hands-on experience in one of both areas.

3. 8/19/04ELEC 5970-003/6970-0033 Low-Power Design Design practices that reduce power consumption at least by one order of magnitude; in practice 50% reduction is often acceptable. General topics –High-level and software techniques –Gate and circuit-level methods –Power estimation techniques –Test power

4. 8/19/04ELEC 5970-003/6970-0034 VLSI Chip Power Density 4004 8008 8080 8085 8086 286 386 486 Pentium® P6 1 10 100 1000 10000 19701980199020002010 Year Power Density (W/cm 2 ) Hot Plate Nuclear Reactor Rocket Nozzle Sun’s Surface Source: Intel 

5. 8/19/04ELEC 5970-003/6970-0035 Specific Topics on Low-Power Power dissipation in CMOS circuits Low-power CMOS technologies Dynamic reduction techniques Leakage power Power estimation

6. 8/19/04ELEC 5970-003/6970-0036 Built-In Self-Test (BIST) Circuit includes hardware to test itself Learn basic concepts of digital BIST Project emphasis on mixed-signal BIST

7. 8/19/04ELEC 5970-003/6970-0037 Power in a CMOS Gate V DD i DD (t) Ground

8. 8/19/04ELEC 5970-003/6970-0038 Power and Energy Instantaneous power (Watts) P(t) = i DD (t) V DD Peak power (Watts) P peak = Max {P(t)} Average power (Watts) P av = [ ∫ 0 T P(t) dt ]/T Energy (Joules) E = ∫ 0 T P(t) dt

9. 8/19/04ELEC 5970-003/6970-0039 Components of Power Dynamic –Signal transitions Logic activity Glitches –Short-circuit Static –Leakage

10. 8/19/04ELEC 5970-003/6970-00310 Power of a Transition V DD Ground C R R Power = CV DD 2 /2

11. 8/19/04ELEC 5970-003/6970-00311 Logic Activity and Glitches 4 5 7 6 1 2 3 d=2 d=1

12. 8/19/04ELEC 5970-003/6970-00312 Power Estimation Methods Spice: Accurate but expensive Logic-level –Event-driven simulation –Statistical –Probabilistic High-level: Hierarchical

13. 8/19/04ELEC 5970-003/6970-00313 Low-Power Design Techniques Circuit design methods – Reduced supply voltage – Adiabatic switching and charge recovery – Logic design for reduced activity – Reduced Glitches – Transistor sizing – Pass-transistor logic – Pseudo-nMOS logic – Multi-threshold gates

14. 8/19/04ELEC 5970-003/6970-00314 Low-Power Design Techniques Functional and architectural methods –Clock suppression –Power down –Algorithmic and Software methods

15. 8/19/04ELEC 5970-003/6970-00315 Student Evalulation Homework (30%) – three Student presentation (10%) Research paper (30-60%) – a publishable paper will exempt the student from the final exam Final Exam (0-30%)