Download presentation
Presentation is loading. Please wait.
1
CMPUT 329 - Computer Organization and Architecture II1 CMPUT329 - Fall 2003 TopicJ: Counters José Nelson Amaral
2
CMPUT 329 - Computer Organization and Architecture II2 Reading Material Section 8.5 of Wakerly.
3
CMPUT 329 - Computer Organization and Architecture II3 Shift Registers A shift register is an n-bit register that can shift its stored data by one bit position at each clock tick A serial input (SERIN) specifies a new bit to be shifted in. A serial output (SEROUT) has the value of the bit that is shifted out. In a serial-in serial-out register only one bit is out at any clock cycle. In a serial-in parallel-out register all stored bits are out at every clock cycle.
4
CMPUT 329 - Computer Organization and Architecture II4 Shift Registers serial-in, serial-out serial-in, parallel-out
5
CMPUT 329 - Computer Organization and Architecture II5 Shift Register parallel-in, serial-out
6
CMPUT 329 - Computer Organization and Architecture II6 MSI Shift Registers Bidirectional
7
CMPUT 329 - Computer Organization and Architecture II7 Shift Register parallel-in, parallel-out
8
CMPUT 329 - Computer Organization and Architecture II8 Quiz Design a function table for a 4-bit shift register that at any clock cycle can perform one of the four functions: Hold: keep the same value that it had in the previous cycle Shift right: shift the values to the right, and shift in the value of an RIN input Shift left: shift the values to the left, and shift in the value of an LIN input Load: Load the values of inputs A, B, C, D, into flip-flops QA, QB, QC, QD. If you were to specify this shift register as a finite state machine, how many states your machine would have?
9
CMPUT 329 - Computer Organization and Architecture II9 74x194: 4-bit Universal Shift Register
10
CMPUT 329 - Computer Organization and Architecture II10 FSM for the 74x194 0000 0001 0010 0011 0100 0101 0111 0110 1000 1001 1010 1100 1011 1110 1101 1111 SL & LIN=1+ Load & ABCD=0001SR & RIN=1+ Load & ABCD=1000 Hold + Load & ABCD=0000
11
CMPUT 329 - Computer Organization and Architecture II11 74x194: 4-bit Universal Shift Register
12
CMPUT 329 - Computer Organization and Architecture II12 74x194: 4-bit Universal Shift Register
13
CMPUT 329 - Computer Organization and Architecture II13 74x299: 8-bit Universal Shift Register The 74x299 is an 8-bit version of the 74x194. It implements bidirectional three-state lines for input and output to save pins.
14
CMPUT 329 - Computer Organization and Architecture II14 74x299: 8-bit Universal Shift Register
15
CMPUT 329 - Computer Organization and Architecture II15 Serial/Parallel Conversions SYNC is a reference signal that indicates the beginning of a byte or word.
16
CMPUT 329 - Computer Organization and Architecture II16 Parallel-to-serial conversion frame
17
CMPUT 329 - Computer Organization and Architecture II17
18
CMPUT 329 - Computer Organization and Architecture II18
Similar presentations
© 2025 SlidePlayer.com Inc.
All rights reserved.