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MICE Electronics Upgrade P J Smith (University of Sheffield) J Leaver (Imperial College) 17 th June 2009.

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Presentation on theme: "MICE Electronics Upgrade P J Smith (University of Sheffield) J Leaver (Imperial College) 17 th June 2009."— Presentation transcript:

1 MICE Electronics Upgrade P J Smith (University of Sheffield) J Leaver (Imperial College) 17 th June 2009

2 MICE Overview Brief overview of the work that is being undertaken in the target control electronics upgrade Interlocks into the target control system For Discussion: Signals to be sent to ISIS Fault Conditions with the target controller 17/6/20092P J Smith - University of Sheffield

3 MICE Current Upgrade We are currently working through a 3 stage plan to upgrade the target electronics 1.Replace the current controller with a system that allows more flexibility and can be controlled via a PC interface. Electronics can also be queried via the PC. 2.Replace much of the peripheral circuitry with circuitry that also can be brought under the control of the PC interface/target controller 3.Replace the targets third party DAQ with our own custom target DAQ. – Tailor it to our own needs –No integration problems due to third party closed source drivers Estimate that the complete upgrade will take about  18 months with stage 1 being ready shortly after the new target is installed in the summer of 09. 17/6/20093P J Smith - University of Sheffield

4 MICE Current Upgrade The current PIC based system is being replaced with a USBDAQ board. A general purpose I/O board tied to a Spartan FPGA. As the name suggests the board has a USB controller that allows it to communicate with a host PC. – Built peripheral boards that communicate with outside world based on old circuit designs. –An interface board has been designed that connects the peripheral boards to the USBDAQ board –Firmware that was programmed into the PIC is being transferred to the FPGA. However this is a ground-up reprogram as code from PIC is not transferable (completely different technologies) 17/6/2009P J Smith - University of Sheffield4

5 MICE 17/6/2009P J Smith - University of Sheffield5

6 MICE Interlocks There are 2 ‘levels’ of interlocks here. 1) Internal control interlocks to prevent the user from performing certain tasks in an incorrect order (logical) 2) External signals that enter the system In reality the correct functioning of the system is dependent upon both of these Currently the only hard wired external interlock is the target frame position and enable key. Under normal functioning we intend to implement : (-> Target Frame cannot be lowered until the target is in its hold position) -> Target Frame has to be raised before the target can be parked Ability to add up to 8 external interlocks to the target controller Controller response to a given interlock can be programmed into the FPGA (requires firmware update and a reprogram) 17/6/20096P J Smith - University of Sheffield

7 MICE Signals to ISIS 15 RG178 Signal Cables were installed last summer between MICE LCR and ISIS LCR. These were put in place to allow signals to pass between these 2 locations. For MICE Cleaner Beamloss signals Cleaner Trigger Signals For ISIS (5 spare) Intention is to send ISIS various signals pertaining to the status of the target system. After discussion with Dean Adams the decision was to send the following signals: Target Position Frame Position (Actuation Signal)? (Particle Rate Signal) – Jean Sebastian? (Target System Cannot Provide) 17/6/20097P J Smith - University of Sheffield

8 MICE Fault Conditions What to do in the case of a fault condition? (For Discussion) Two conditions that I’m concerned about: A fault condition that is picked up by the controller –This means that it is reportable… …but means that the target is non-functional and cannot be held out of the beam – I could send you an error signal - Although this feature has not currently been designed into the upgraded system (but it could be during stage 2 upgrade) – How do you view that signal in the MLCR? –The system could be made so that the control PC automatically raises the frame in the case of an error condition. ( James and myself discussing how we can implement this) Major failure, such as the power supply is interrupted to the target controller electronics. –It is hard to see how this can be signalled. –Control PC could raise the frame if that system is still ok This suggests that a protocol system may be useful… but we have already witnessed such a system break down –Requires formalising and some thought. 17/6/20098P J Smith - University of Sheffield

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