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Hardware-in-the-Loop Testbed Team 186. Project Collaborators Team Members: o Aaron Eaddy – EE o Ken Gobin – EE/COMPE o Douglas Pence – ENGR PHYS/EE Team.

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Presentation on theme: "Hardware-in-the-Loop Testbed Team 186. Project Collaborators Team Members: o Aaron Eaddy – EE o Ken Gobin – EE/COMPE o Douglas Pence – ENGR PHYS/EE Team."— Presentation transcript:

1 Hardware-in-the-Loop Testbed Team 186

2 Project Collaborators Team Members: o Aaron Eaddy – EE o Ken Gobin – EE/COMPE o Douglas Pence – ENGR PHYS/EE Team Advisor/Sponsor: o Sung Yeul Park – Assistant Professor

3 Outline Background Components: o Microcontroller o Interface circuit o Sensor circuits Design Updates Circuitry Timeline Budget

4 Background Hardware-in-the-Loop: o A simulation technique that is used in the development and testing of complex real-time embedded system designs. o Benefits: Function tests are able to be done at an early stage of development. Laboratory tests are cheaper, more flexible and highly controllable. No potential major risk of physically damaging test failures. Tests are easy to reproduce and provide highly consistent results. Improve battery operation and monitoring State of Health State of Charge Remaining useful life Voltage, current, and temperature

5 Components

6 Design Updates Initial Design: TI ezDSP® F28335 o 6 data/address lines, 59 GPIO, ADC o MATLAB® Simulink, Code Composer Studio® Updated Design – Rev 1: dSPACE® RTI-1104 o ADC ports, PWM CP-18 connector, embedded microcontroller o MATLAB® Simulink software for digital signal processing and ease-of-use display o Removed CCS as an “extra” middle software process. Less complicated and more robust. Updated Design – Rev 2: o Changed from ‘8’-channel design to hybrid ‘4+2’-channel design o Changed from 1 to 2 PCB design – isolate analog from digital and provide safety barrier o Simplified GPIO requirements with PWM MUX select o Added scaling, filtering and digital isolator

7 dSPACE® Microcontroller dSPACE® RTI-1104 dSPACE® ControlDesk

8 dSPACE® Limitations Maximum 8 ADC channels Maximum of 10-Volt ADC processing signal limit Maximum of 5-Volt system hardware limit Main reason for switching from ‘8’-channel design to ‘4+2’- channel design was related to these limitations, specifically the 8 ADC channel hardware limitation.

9 Sensors and Circuits Voltage Sensor Current Sensor o Internal Impedance of each Cell. Temperature Sensor o Ambient o Battery Surface Amplification o Integration with ADC Scaling for Multiple Cells Requirements o 30V o 4 Cells Integration

10 Voltage Sensing Circuit

11 Current Sensor

12 Current Sensing Circuit

13 Temperature Sensing Circuit

14 Interface Circuit

15 Printed Circuit Board Design

16 Timeline Research Item JanFebMar Apr 3412341 234 Design Schematics + Part List xx x PCB Layout x x xxxxxx Parts Order xxx PCB Order xx Board Assembly xx Board Testing Hardware xx DSP x x Power Test xx

17 Budget Total Budget $1,000 Current Expenditure Estimate: o Temperature Sensors and Initial Parts - $156 o PCB Order - $198 o Additional Parts and Expandable Testing Components - $492 Budget Surplus Estimate$154

18 Questions ?


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