1. Near-Infrared Detector Arrays - The State of the Art -
Klaus W. Hodapp
Institute for Astronomy
University of Hawaii

2. Historic Milestones 1800: Infrared radiation discovered
1960s and 70s: Single detectors (PbS, InSb …)
1980s: First infrared arrays (322, 5862, 642, 1282)
1990: NICMOS-3 (2.5m PACE-1 HgCdTe)
1991: SBRC 2562 (InSb)
1994: HAWAII-1 (2.5m PACE-1 HgCdTe)
1995: Aladdin (InSb)
2000: HAWAII-2 (2.5m PACE-1 HgCdTe)
2002: HAWAII-1RG (5.0μm MBE HgCdTe)
2002: HAWAII-2RG (5.0μm MBE HgCdTe)
2002: RIO 2K×2K NGST InSb
2002: RIO 2K×2K Orion

3. NICMOS PICNIC HAWAII HAWAII-2RG
Hawaii-2RG Heritage
All Successfully Developed on 1st Design Pass
NICMOS
PICNIC
HAWAII
1987
1990
1994
1994
1998
2000 -2 -1
4.2 million pixels
>13 million FETs
Expect CDS <10e-
16,384 pixels
70,000 FETs
CDS: <50e-
65,536 pixels
250,000 FETs
CDS: <30e-
-1R
65,536 pixels
250,000 FETs
CDS: <20e-
1.05 million pixels
>3.4 million FETs
CDS: <10e-
CDS: <TBD e-
HAWAII-2RG
Exploiting Many Lessons
Learned to Minimize Development Risk
And Enable Next Generation Performance
Transition to 0.25µm CMOS
With Full Wafer Stitching and
Low-Power System-on-Chip ASIC

4. Infrared Arrays
Diode Array
Multiplexer
Readout Electronics

6. Electric Field in a CCD 1.
The n-type layer contains an excess of electrons that diffuse into the p-layer. The p-layer contains an
excess of holes that diffuse into the n-layer. This structure is identical to that of a diode junction.
The diffusion creates a charge imbalance and induces an internal electric field. The electric potential
reaches a maximum just inside the n-layer, and it is here that any photo-generated electrons will collect.
All science CCDs have this junction structure, known as a ‘Buried Channel’. It has the advantage of
keeping the photo-electrons confined away from the surface of the CCD where they could become trapped.
It also reduces the amount of thermally generated noise (dark current).
Electric potential
Electric potential n p
Potential along this line shown
in graph above.
Cross section through the thickness of the CCD

7. Charge Collection in a CCD.
Photons entering the CCD create electron-hole pairs. The electrons are then attracted towards
the most positive potential in the device where they create ‘charge packets’. Each packet
corresponds to one pixel
boundary
pixel
incoming
photons
boundary
pixel
Electrode Structure
n-type silicon
Charge packet
p-type silicon
SiO2 Insulating layer

8. NIR Photodiode Array Technologies
Problems:
Substrate availability
Thermal expansion match to Si
Lattice match to detector material
LPE HgCdTe on Sapphire (PACE-1): Rockwell, CdTe buffer
MBE HgCdTe on CdZnTe: Rockwell, thin or substrate removed, AR coated
InSb (Raytheon): Bulk material, p-on-n, thinned, AR coated
LPE HgCdTe on CdZnTe: Raytheon, thick
MBE HgCdTe on Si: Raytheon, ZnTe and CdTe buffer, thick, thin in future

10. Reset-Read Sampling 0.5 V Diode Bias Voltage 0 V Time Reset
Open Shutter
Close Shutter
0.5 V
Reset
Reset
Diode Bias Voltage
kTC Noise
Reset-Read Sampling
Readout
0 V
Time

11. Recharge Noise in Capacitors
Energy stored in a capacitor: E = ½ Q²/C
Noise Energy must be: E_n = ½kT
Noise Charge: ½ (Q_n)²/C = ½kT
(Q_n)² = kTC
Q_n = √ kTC

12. Example:
Capacitance: 50 fF, T=37 K
k = 1.38 e-23 J/K
Q_n = √ kTC
Q_n = 5 e-18 C
With q_e = 1.6 e-19 C
Q_n = 32 electrons rms

13. Double Correlated Sampling
Open Shutter
Close Shutter
kTC noise
0.5 V
Reset
Reset
Readout
Diode Bias Voltage
CDS Signal
Double Correlated Sampling
Readout
0 V
Time

14. Fowler (multi) Sampling
Open Shutter
Close Shutter
kTC noise
0.5 V
Reset
Reset
Readout
Diode Bias Voltage
MCS Signal
Fowler (multi) Sampling
Readout
0 V
Time

15. Up-the-Ramp Sampling 0.5 V Diode Bias Voltage 0 V Time Reset
Open Shutter
Close Shutter
kTC noise
0.5 V
Reset
Reset
Diode Bias Voltage
MCS Signal
Up-the-ramp Readout
Up-the-Ramp Sampling
0 V
Time

17. 20482 Readout Provides Low Read Noise for Visible and MWIR
HAWAII-2: Photolithographically Abut 4 CMOS Reticles to Produce Each ROIC
Twelve ROICs per 8” Wafer
20482 Readout Provides Low Read Noise for Visible and MWIR

18. External JFETs
optimized

22. HAWAII-1 Rockwell Science Center
1024 m HgCdTe detector array
4 Quadrant architecture
4 Output amplifiers
18.5 m pixels
LPE HgCdTe on sapphire (PACE-1)
Use of external JFETs possible
Available for purchase

23. HAWAII-1 Focal Plane Array

24. HAWAII-1 Quantum efficiency (50% - 60%) Dark current 0.01 e-/s (65K)
Read noise about e- rms CDS
Residual image effect
Some multiplexer glow
Fringing

26. 3600 s
128 samp
T= 65K

27. Internal FETs

28. External JFETs
optimized

30. Fringing in PACE-1 material

31.
Residual Images in PACE-1 HAWAII-1 Arrays

33. Aladdin Raytheon Center for Infrared Excellence
10241024 InSb detector array
4 Quadrant architecture
32 Output amplifiers
27 m pixels
Thinned, AR coated InSb
Three generations of multiplexers
“Foundry Run” distribution mode

34. Aladdin Quantum efficiency high (80% - 90%)
Dark current e-/s
Read noise about 40 e- rms CDS
Charge capacity 200,000 e-
Residual image effect
No amplifier glow

35. Aladdin frame taken with SPEX (J. Rayner)

36. NIRI Aladdin Image of AFGL2591

37. HAWAII-2 Rockwell Science Center
2048 m HgCdTe detector array
4 Quadrant architecture
32 Output amplifiers
3 Output modes available
18.0 m pixels
Use of external JFETs possible
Reference signal channel

38. 20482 Readout Provides Low Read Noise for Visible and MWIR
HAWAII-2: Photolithographically Abut 4 CMOS Reticles to Produce Each ROIC
Twelve ROICs per 8” Wafer
20482 Readout Provides Low Read Noise for Visible and MWIR

41. HAWAII-2 Reference Signal

42. New Developments Multiplexers: Detector Materials: HAWAII-1R
HAWAII-1RG
HAWAII-2RG
Abuttable 2K2K
RIO developments
Detector Materials:
MBE HgCdTe on CdZnTe
MBE HgCdTe on Si
Cutoff wavelength
Thinning
Substrate removal
AR coating

43. NGST H-2RG & H-1R Packaging Critical Design Review May 8th, 2001
Rockwell Science Center
Thousand Oaks, CA

44. HAWAII Heritage HAWAII - 2 HAWAII - 1 HAWAII - 1R HAWAII - 2RG 1998
2048 x 2048 pixels
13 million FETs
0.8 µm CMOS
3-4 e- (8/8 Fowler)
10 e- (CDS)
1998
HAWAII - 2
HAWAII - 1
HAWAII - 1R
1994
2000
Stitching
(four independ.
Quadrants)
Reference
pixels
WFC 3
1024 x 1024 pixels
3.4 million FETs
0.8 µm CMOS
3-4 e- (8/8 Fowler)
10 e- (CDS)
1024 x 1024 pixels
3.4 million FETs
0.5 µm CMOS
no noise data
Guide mode
& additional
read/reset opt.
True stitching
2048 x 2048 pixels
25 million FETs
0.25 µm CMOS
HAWAII - 2RG

45. RSC Approach H A W A I I - 2 R G
HgCdTe Astronomy Wide Area Infrared Imager
with 2k2 Resolution, Reference pixels and Guide Mode
HgCdTe detector
substrate removed to achieve 0.6 µm sensitivity
Specifically designed multiplexer
highly flexible reset and readout options
optimized for low power and low glow operation
three-side close buttable
Two-chip imaging system: MUX + ASIC
convenient operation with small number of clocks/signals
lower power, less noise

46. HAWAII-2RG: UMC 0.25µm CMOS 3.3/2.5V Process on Epi Wafers
1 Poly/4- or 5-Metal
65/33Å Oxide
Low, Normal and High Threshold Voltage Options
MIM (Analog) Capacitor
22 mm by 22 mm Stepper Field
Full Intra-Reticle Stitching
One Mask Set Comprising Modular Blocks to Photocompose Each CMOS Multiplexer on 200 mm Wafers

47. NGST Multiplexer Overview
2048 x 2048 resolution with 18 µm square pixels
True stitched design (electrical connections across stitching lines)
Close buttable die : mm mux overlap on top (pad) side mm mux overlap on each side  gap  2 mm)
1, 4, or 32 output mode selectable
Slow mode (100 kHz) and fast mode (5 MHz with additional column buffers) selectable, both usable with internal and external buffers
NGST

48. Fast scan direction individually selectable for each subblock
Output Options
Slow scan direction selectable
Single output for all
2048 x 2048 pixels
(guide mode always
uses single output)
Fast scan direction selectable
Single Output Mode
default scan directions
Fast scan direction individually
selectable for each subblock
Separate output for
each subblock of
512 x 2048 pixels
Slow scan direction selectable
4 Output Mode
default scan directions

49. Output Options (2) 32 Output Mode Separate output for each subblock of
Slow scan direction selectable
32 Output Mode
Separate output for
each subblock of
64 x 2048 pixels
Four different patterns for
fast scan direction selectable
default scan directions

50. Interleaved readout of full field and guide window
FPA
Switching between full field and guide window is possible at any time
 any desired interleaved readout
pattern can be realized
Three examples for interleaved readout:
Full field
1. Read guide window after reading part of the full field row
2. Read guide window after reading one full field row
Guide window
3. Read guide window after reading two or more full field rows

51. Reset Schemes

52. 3-D Barrier to Prevent Glow from Reaching the Detector

53. HAWAII-1RG Comes First H A W A I I - 1 R G
In order to decrease risk and to get testable devices earlier, a smaller version of the HAWAII-2RG will be produced first.
H A W A I I R G
1024 x 1024 pixels (upper left quadrant of HAWAII-2RG)
Full functionality of HAWAII-2RG
16 / 2 / 1 Outputs
Some Pads folded along the right mux side
Fits in one reticle  no stitching required

54. CCD Mosaic Building Blocks -A Mature Packaging Technology

55. 8K x 8K Mosaic CCD Array
Constructed from 2Kx4K building block arrays

56. Prototype 2×2 Mosaic for NGST

58. Ground-Based Camera Projects
IfA ULB
UKIRT WFC
CFHT WIRCAM
Gemini GSAOI
ESO VISTA
Keck KIRMOS

59. Continuing to Aggressively Use CMOS
5 Designs in 0.25µm
3.3/1.8V 0.18µm CMOS underway for ProCam-2
Also migrating to 0.13µm on newest programs to boost performance via Cu and low-k interlayer dielectrics
After Isaac (1999)