1. SPEAR 3 Upgrade SSRL/SLAC January 2001  Computer Control System  Beam Monitoring and Feedback Systems  Timing System  Machine Protection Systems  Personnel Protection Systems  Cable Plant SPEAR 3 Instrumentation and Control Systems

2. SPEAR 3 Upgrade SSRL/SLAC January 2001

3. Computer Control System Expand present control system: DEC Alpha (VMS) + switched Ethernet CAMAC and VME crates +  VAX controllers X-terminal and PC consoles EPICS applications and GUI tools EPICS Channel Access to existing control system Database (Oracle RDB) New interface hardware and development: Main power supply controllers (slow) Bitbus control, obsolete microcontrollers Fast power supply digital controller - develop Fast Ethernet (100 Mb/s) + switch BPM Processor, Orbit Feedback interface Power PCs RF Control System EPICS IOC (NI 68030 or replacement PPC), VXI crates Software development: Intelligent crate controllers local process and control, data logging Power Supply controllers, BPM Processor, Orbit Feedback drivers, control programs, DSP code RF Control System EPICS,unix development system VxWorks, Matlab Application software VMS, EPICS, Matlab

4. SPEAR 3 Upgrade SSRL/SLAC January 2001 Orbit Control with Matlab and EPICS Channel Access

5. SPEAR 3 Upgrade SSRL/SLAC January 2001 Matlab-based Accelerator Toolbox and Simulator H-V coupling error analysis

6. SPEAR 3 Upgrade SSRL/SLAC January 2001 VME Crates and CPUs VGM5 VME Dual PPCG4/G3 CPU Board (Synergy) Dual or single CPUs in a single slot solution Advanced PowerPC G4/G3 architecture 300-466 MHz CPU speed Backside L2 cache 1 or 2 MB per CPU PØ-PCI(TM) secondary data bus, ~264 MB/s 16-512 MB high-speed SDRAM Up to 9 MB Flash Supports industry-standard PMC I/O Autosensing 10/100Base-TX Ethernet Two serial ports standard; SCSI option 4-digit clock/calendar chip is Y2K compliant Supports VxWorks, Linux Supports RACEway with PXB2 PMC module VME64x support VME Speedway doubles non-block transfer rate Conformal coating option VME Crates (Wiener) 21 slots, 6U VME cards 3U space for fan tray and plenum chamber Card guides and ejector rails IEEE 1101.10 Monolithic backplane VME64x or VIPA Microprocessor controlled fan-tray unit UEL 6020 with high efficient DC-fans (3 ea.), alphanumeric display, variable speed fan Temperature control, front or bottom air inlet Up to 8 temperature sensors in bin area with network option for remote monitoring and control (CAN-bus) Remote CPU reset capability Used at SLAC, BNL, CERN, BESSY, etc.

7. SPEAR 3 Upgrade SSRL/SLAC January 2001 Beam Monitoring and Feedback Systems New for SPEAR 3: BPM Processing System Orbit Feedback System DCCT Scraper Controls Tune Monitor Synchrotron Light Monitor Quadrupole Modulation System From SPEAR 2: Upgraded injection monitors Longitudinal Bunch Phase Monitor Transverse Bunch Phase Monitor

8. SPEAR 3 Upgrade SSRL/SLAC January 2001 BPM Processing and Orbit Feedback System

9. SPEAR 3 Upgrade SSRL/SLAC January 2001 BPM Processing Remote Crate (1 of 4)

10. SPEAR 3 Upgrade SSRL/SLAC January 2001 Orbit Feedback Performance

11. SPEAR 3 Upgrade SSRL/SLAC January 2001 potential problem with TE 10 mode in antechamber BPM locations (104 total; 90 used for orbit feedback) Corrector locations (72 total; 54 H and 54 V correctors used for orbit feedbck ) H/V V (H available) H/V H (V available) BPM and Orbit Corrector Locations

12. SPEAR 3 Upgrade SSRL/SLAC January 2001 BPM Processing and Orbit Feedback Performance Specifications

13. SPEAR 3 Upgrade SSRL/SLAC January 2001 BPM Processing and Orbit Feedback Component Development RF-IF Converters 64 BPMs initially; 92 later Modify existing design for new RF frequency Considering commercial manufacturer Digital IF Processors 8 ea. 8-channel modules (+ spares) Commercial vendor; 1st units received Timing/Crate Driver Module 4 ea. + spares, SLAC design nearly complete Remote Crate BPM Data Acquisition CPUs Power PC + 2 PMC slots (Synergy) RACEway link (PMC) to IF Processors ( 160 MB/s) Reflective memory link (PMC) to central crate >12 Mb/s for each of 4 crates Orbit Feedback DSP Dual Power PC + 2 PMC slots (Synergy) Reflective memory link to 4 remote crates Fast Ethernet link (PMC) to corrector supply controllers ( 100 Mb/s) Fast Digital Power Supply Controllers 15 ea (+ spares) crate-based 8-channel controllers 4 kHz aggregate update rate with Fast Ethernet Digital regulation capability SLAC design LO and Timing Generators Signals derived from 476.3 MHz MO Commercial low noise design

14. SPEAR 3 Upgrade SSRL/SLAC January 2001 BPM Processor single-bunch response T rev

15. SPEAR 3 Upgrade SSRL/SLAC January 2001 BPM Processing - IF Processor

16. SPEAR 3 Upgrade SSRL/SLAC January 2001 BPM RF-IF Processor Options 4:1 button MUX no BPM MUX no button MUX 4:1 BPM MUX 1st turn/singleturn BPM measurement

17. SPEAR 3 Upgrade SSRL/SLAC January 2001 # BPMs90 Resolution 1st turn: 1.8 mm (0.03 mA) turn-turn: 13  m (> 5 mA) feedback: 1  m (160 avg) Current range 5-500 mA (<13  m turn-turn res) Current dependency< 3  m Orbit acquisition rate2-4 kHz for feedback (~25 kHz max ) RF-IF converter - prototype 8-chan. IF digital processor BPM Processing

18. SPEAR 3 Upgrade SSRL/SLAC January 2001 Orbit Feedback Modeling and Programming RTI Control Shell - accepts Simulink models, other representations - generates VxWorks code - runs interactively with model and/or real world MATLAB/Simulink

19. SPEAR 3 Upgrade SSRL/SLAC January 2001 Machine Protection Systems Vacuum Interlock PLC 1 ~160 vacuum chamber water flow switches ~24 ion gauges ~310 thermal switches 12 BL Vacuum OK summaries Enables RF, ring isolation valves + stoppers Expand existing system Magnet Cooling Interlock PLC 2 ~20 water flow switches ~1550 thermal switches/~264 interlock circuits Enable magnet power supplies Expand existing system Chamber Temperature Monitor PLC 3 ~375 thermocouples (30-200 o C  1 o C) ~16 RTDs (10- 70 o C  1 o C) ~960 chan/s measurement rate Generates alarms, status for Control System New system, commercially available Orbit Interlock Active for beam current >20 mA less if beam lines open 20 BPMs (in beam line areas) future expansion: 2 per new ID; 30 total New system design BPM processors: commercial or SLAC design BPLD and Beam Abort: new design, VME components

20. SPEAR 3 Upgrade SSRL/SLAC January 2001 Orbit Interlock Coupler Specifications Number of BPMs20 Processing frequency476.3 MHz Beam current range (nom)5-500 mA Resolution (>5 mA)<50  m Accuracy (wrt quad center)<100  m Dynamic range (intensity)>60 dB Channel isolation>60 dB Beam abort time (via RF system)<1 ms Interlock Trip Criterion (>20 mA) ID vertical:ID horizontal: (uses 2 ea ID straight BPMs per ID, 3 m apart  0.73 mm |y| for angle trip ) Dipole BL vert: |y| < 2.45 mmDipole BL hor: |x| < 5 mm (uses upstream ID BPM and downstream dipole BPM per dipole source point)

21. SPEAR 3 Upgrade SSRL/SLAC January 2001 Beam Containment System Long Ion Chamber (LION)

22. SPEAR 3 Upgrade SSRL/SLAC January 2001 Quadrupole Modulation System

23. SPEAR 3 Upgrade SSRL/SLAC January 2001 DCCT Parametric Current Transformer (Bergoz) 1 A full scale 0.5  A resolution (1s integration) Dynamic range > 2x10 7 Absolute accuracy < 0.05% Linearity error < 0.01% DC -100 kHz Output +/- 10V bipolar 113 or 175 mm ID

24. SPEAR 3 Upgrade SSRL/SLAC January 2001 Tune Monitor

25. SPEAR 3 Upgrade SSRL/SLAC January 2001 Synchrotron Light Monitor

26. SPEAR 3 Upgrade SSRL/SLAC January 2001 SPEAR 3 Timing and RF Signal Generator System SPEAR RF:f SPrf = 372 x f SPrev = 476.300 MHzBPM LO:f LO = 385 x f SPrev = 492.935 MHz Booster RF: f Brf = 280 x f SPrev = 358.505 MHzBPM IF: f IF = 13 x f SPrev = 16.645 MHz SPEAR revolution freq:f SPrev = 1.2804 MHzIF digitizing clock:f IFclk = 50 x f SPrev = 64.020 MHz Streak camera clock: f SC = f SPrf /4 = 93 x f SPrev = 119.075 MHz Wenzel, Inc.

27. SPEAR 3 Upgrade SSRL/SLAC January 2001 Single-bunch filling Phase-lock Booster RF to SPEAR RF: C Boo /C SPEAR = 4/7 h SP = 372 h Boo = 160  f Boo /f SPEAR = 70/93 f SP = 476.300 MHz  f Boo = 358.505 MHz Discrete bucket-dependent phase shift of f Boo :  N+1 =  N + 360 o x 70/93 =  N + 271 o =  N - 89 o Injection Timing System

28. SPEAR 3 Upgrade SSRL/SLAC January 2001 SPEAR 3 Master Oscillator 1-500 MHz, DDS-based 0.2 Hz step resolution Phase-continuous frequency switching Stability: 3x10 -9 /day, 10 -6 /yr,  10 -8 /0-50 o C 0.057 o integrated phase noise, 0.5 Hz-15 kHz GPIB control PTS 500

29. SPEAR 3 Upgrade SSRL/SLAC January 2001 Cable Tray Routes