Download presentation
Presentation is loading. Please wait.
Published byPaul Haynes Modified over 9 years ago
1
Prof. John Nestor ECE Department Lafayette College Easton, Pennsylvania 18042 nestorj@lafayette.edu ECE 313 - Computer Organization Lecture 8 - Multiplication and Division Fall 2004 Reading: 3.4-3.5 Portions of these slides are derived from: Textbook figures © 1998 Morgan Kaufmann Publishers all rights reserved Tod Amon's COD2e Slides © 1998 Morgan Kaufmann Publishers all rights reserved Dave Patterson’s CS 152 Slides - Fall 1997 © UCB Rob Rutenbar’s 18-347 Slides - Fall 1999 CMU other sources as noted
2
ECE 313 Fall 2004Lecture 8 - Mult. and Division2 Outline - Multiplication and Division Multiplication Review: Shift & Add Multiplication Review: Booth’s Algorithm Combinational Multiplication MIPS Multiplication Instructions Division Summary
3
ECE 313 Fall 2004Lecture 8 - Mult. and Division3 Multiplication Basic algorithm analogous to decimal multiplication Break multiplier into digits Multiply one digit at a time; shift multiplicand to form partial products Create product as sum of partial products n bit multiplicand X m bit multiplier = (n+m) bit product Multiplicand 0110 (6) Multiplier X 0011 (3) 0110 0000 Product 00010010 (18) Partial Products
4
ECE 313 Fall 2004Lecture 8 - Mult. and Division4 Multiplier Hardware Sequential Combinational
5
ECE 313 Fall 2004Lecture 8 - Mult. and Division5 Sequential Multiplier - First Version Multiplicand (64 bits) Shift Left Multiplier (32 bits) Shift Right Product (64 bits) Write Control 64-bit ALU LSB Multiplicand shifts left Multiplier shifts right Sample LSB of multiplier to decide whether to add
6
ECE 313 Fall 2004Lecture 8 - Mult. and Division6 Algorithm - 1st Cut Multiplier START DONE 1. Test MPY0 1a. Add MCND to PROD Place result in PROD 2. Shift MCND left 1 bit 2. Shift MPY right 1 bit 32nd Repitition? Multiplier0=1Multiplier0=0
7
ECE 313 Fall 2004Lecture 8 - Mult. and Division7 Animation - 1st Cut Multiplier Multiplier Product (64 bits) Write Control 64-bit ALU LSB Multiplicand Multiplicand shifts left Multiplier shifts right Sample LSB of multiplier to decide whether to add
8
ECE 313 Fall 2004Lecture 8 - Mult. and Division8 Sequential Multiplier - 2nd Version Observation: we’re only adding 32 bits at a time Clever idea: Why not... Hold the multiplicand still and… Shift the product right! Multiplicand (32 bits) Multiplier (32 bits) Shift Right Product (64 bits) Write Control 32-bit ALU LSB Shift Right LHPROD (32 bits) RHPROD (32 bits)
9
ECE 313 Fall 2004Lecture 8 - Mult. and Division9 Algorithm - 2nd Version Multiplier START DONE 1. Test MPY0 1a. Add MCND to left half of PROD Place result in left half of PROD 2. Shift PROD right 1 bit 2. Shift MPY right 1 bit 32nd Repitition? Multiplier0=1Multiplier0=0 No: <32 Repititions Yes: 32 Repititions
10
ECE 313 Fall 2004Lecture 8 - Mult. and Division10 Multiplicand (32 bits) Product (64 bits) Write Control 32-bit ALU LSB Shift Right Sequential Multiplier - 3nd Version Observation: we can store the multiplier and product in the same register! As multiplier shifts out…. Product shifts in LHPROD (32 bits) MPY (initial) (32 bits) MP/RHPROD (32 bits)
11
ECE 313 Fall 2004Lecture 8 - Mult. and Division11 Algorithm - 3rd Version Multiplier START DONE 1. Test PROD0 1a. Add MCND to left half of PROD Place result in left half of PROD 2. Shift PROD right 1 bit 0. LOAD MPY in right half of PROD 32nd Repitition? Product0=1Product0=0 No: <32 Repititions Yes: 32 Repititions
12
ECE 313 Fall 2004Lecture 8 - Mult. and Division12 Outline - Multiplication and Division Multiplication Review: Shift & Add Multiplication Review: Booth’s Algorithm Combinational Multiplication MIPS Multiplication Instructions Division Summary
13
ECE 313 Fall 2004Lecture 8 - Mult. and Division13 Signed Multiplication with Booth’s Algorithm Originally proposed to reduce addition steps Bonus: works for two’s complement numbers Uses shifting, addition, and subtraction
14
ECE 313 Fall 2004Lecture 8 - Mult. and Division14 Booth’s Algorithm Observation: if we can both add and subtract, there are multiple ways to create a product Example: multiply 2 ten by 6 ten (0010 two X 0110 two ) Product = (2 X 2) + (2 X 4) OR Product = (2 X -2) + (2 X 8) 0010 X 0110 + 0000 shift + 0010 shift + add + 0000 shift 00001100 0010 X 0110 0000 shift - 0010 shift + subtract 0000 shift + 0010 shift + add 00001100 Regular Algorithm Booth’s Algorithm
15
ECE 313 Fall 2004Lecture 8 - Mult. and Division15 Booth’s Algorithm Continued Question: How do we know when to subtract? When do we know when to add? Answer: look for “runs of 1s” in multiplier Example: 001110011 Working from Right to Left, any “run of 1’s” is equal to: - value of first digit that’s one +value of first digit that’s zero Example : 001110011 First run: -1 + 4 = 3 Second run: -16 + 128 = 112 Total: 112 + 3 = 115
16
ECE 313 Fall 2004Lecture 8 - Mult. and Division16 Implementing Booth’s Algorithm Scan multiplier bits from right to left Recognize the beginning and in of a run looking at only 2 bits at a time “Current” bit a i Bit to right of “current” bit a i-1 0110011100 Beginning Of Run Middle Of Run End Of Run Bit a i Bit a i-1 Explanation 10Begin Run of 1’s 11Middle of Run of 1’s 01End of Run 00Middle of Run of 0’s
17
ECE 313 Fall 2004Lecture 8 - Mult. and Division17 Implementing Booth’s Algorithm Key idea: test 2 bits of multiplier at once 10 - subtract (beginning of run of 1’s) 01 - add (end of run of 1’s) 00, 11 - do nothing (middle of run of 0’s or 1’s) Multiplicand (32 bits) Product (64 bits) Write Control 32-bit ALU Shift Left ADD/ SUB 2 Bits 1:0 LHPROD (32 bits) MP/RHPROD (32 bits)
18
ECE 313 Fall 2004Lecture 8 - Mult. and Division18 Booth’s Algorithm Example Multiply 4 X -9 00100 X 10111 000000101110 +111100 (sub 4 / add -4) 111100101110 111110010111 (shift after add) 111111001011 (shift w/ no add) 111111100101 (shift w/ no add) +000100 (add +4) 000011100101 000001110010 (shift after add) +111100 (sub 4 / add -4) 111101110010 111110111001 Remember 4 = 000100 -4 = 111100 1111011100 = -(0000100011 + 1) = -(0000100100) = -36 = 4 X -9! Drop leftmost & rightmost bit
19
ECE 313 Fall 2004Lecture 8 - Mult. and Division19 Outline - Multiplication and Division Multiplication Review: Shift & Add Multiplication Review: Booth’s Algorithm Combinational Multiplication MIPS Multiplication Instructions Division Summary
20
ECE 313 Fall 2004Lecture 8 - Mult. and Division20 Combinational Multipliers Goal: make multiplication faster General approach Use AND gates to generate partial products Sum partial products with adders
21
ECE 313 Fall 2004Lecture 8 - Mult. and Division21 Array Multiplier X3X3 X2X2 X1X1 X0X0 Y 0. From J. Rabaey, CMOS Digital Integrated Circuits © Prentice-Hall, 1996 X = multiplicand Y = multiplier
22
ECE 313 Fall 2004Lecture 8 - Mult. and Division22 From J. Rabaey, CMOS Digital Integrated Circuits © Prentice-Hall, 1996 Array Multiplier - Critical Paths Critical Path 1 & 2
23
ECE 313 Fall 2004Lecture 8 - Mult. and Division23 Carry-Save Multiplier From J. Rabaey, CMOS Digital Integrated Circuits © Prentice-Hall, 1996 Ripple carry only in final addition!
24
ECE 313 Fall 2004Lecture 8 - Mult. and Division24 Wallace-Tree Multiplier From J. Rabaey, CMOS Digital Integrated Circuits © Prentice-Hall, 1996 Restructure additions to reduce delay
25
ECE 313 Fall 2004Lecture 8 - Mult. and Division25 Outline - Multiplication and Division Multiplication Review: Shift & Add Multiplication Review: Booth’s Algorithm Combinational Multiplication MIPS Multiplication Instructions Division Summary
26
ECE 313 Fall 2004Lecture 8 - Mult. and Division26 Multiply Instructions in MIPS MIPS adds new registers for product result: Hi - upper 32 bits of product Lo - lower 32 bits of product MIPS multiply instructions mult $s0, $s1 multu $s0, $s1 Accessing Hi, Lo registers mfhi $s1 mflo $s1
27
ECE 313 Fall 2004Lecture 8 - Mult. and Division27 Outline - Multiplication and Division Multiplication Review: Shift & Add Multiplication Review: Booth’s Algorithm Combinational Multiplication MIPS Multiplication Instructions Division Division Algorithms MIPS Division Instructions Summary
28
ECE 313 Fall 2004Lecture 8 - Mult. and Division28 Division Overview Grammar school algorithm: long division Subtract shifted divisor from dividend when it “fits” Quotient bit: 1 or 0 Question: how can hardware tell “when it fits?” Dividend 10010101000 Divisor -1000 001 1010 -1000 10 Remainder Quotient Dividend = Quotient X Divisor + Remainder 1
29
ECE 313 Fall 2004Lecture 8 - Mult. and Division29 Division Hardware - 1st Version Divisor DIVR (64 bits) Shift R QUOT (32 bits) Shift L Remainder REM (64 bits) Write Control 64-bit ALU Sign bit (REM<0) ADD/ SUB LSB Shift register moves divisor (DIVR) to right ALU subtracts DIVR, then restores (adds back) if REM < 0 (i.e. divisor was “too big”)
30
ECE 313 Fall 2004Lecture 8 - Mult. and Division30 Division Algorithm - First Version START: Place Dividend in REM DONE REM ≥ 0? 2a. Shift QUOT left 1 bit; LSB=1 2. Shift DIVR right 1 bit 1. REM = REM - DIVR 33nd Repitition? REM ≥ 0REM < 0 No: <33 Repetitions Yes: 33 Repetitions 2b. REM = REM + DIVR Shift QUOT left 1 bit; LSB=0 Restore
31
ECE 313 Fall 2004Lecture 8 - Mult. and Division31 Divide 1st Version - Observations We only subtract 32 bits in each iteration Idea: Instead of shifting divisor to right, shift remainder to left First step cannot produce a 1 in quotient bit Switch order to shift first, then subtract Save 1 iteration
32
ECE 313 Fall 2004Lecture 8 - Mult. and Division32 Divide Hardware - 2nd Version Divisor Holds Still Dividend/Remainder Shifts Left End Result: Remainder in upper half of register QUOT (32 bits) Shift L REM (64 bits) Write Control 32-bit ALU Sign bit (REM<0) ADD/ SUB DIVR (32 bits) Shift L LSB
33
ECE 313 Fall 2004Lecture 8 - Mult. and Division33 Divide Hardware - 3rd Version Combine quotient with remainder register REM (64 bits) Write Control 32-bit ALU Sign bit (REM<0) ADD/ SUB DIVR (32 bits) Shift L LSB Shift R
34
ECE 313 Fall 2004Lecture 8 - Mult. and Division34 Divide Algorithm - 3rd Version START: Place Dividend in REM DONE (shift LH right 1 bit) REM ≥ 0? 3a.. Shift REM left 1 bit; LSB=1 1. Shift REM left 1 bit 2. LHREM = LHREM - DIVR 32nd Repitition? REM ≥ 0REM < 0 No: <32 Repetitions Yes: 32 Repetitions 3b. LHREM = LHREM + DIVR Shift REM left 1 bit; LSB=0
35
ECE 313 Fall 2004Lecture 8 - Mult. and Division35 Dividing Signed Numbers Check sign of divisor, dividend Negate quotient if signs of operands are opposite Make remainder sign match dividend (if nonzero)
36
ECE 313 Fall 2004Lecture 8 - Mult. and Division36 Outline - Multiplication and Division Multiplication Review: Shift & Add Multiplication Review: Booth’s Algorithm Combinational Multiplication MIPS Multiplication Instructions Division Division Algorithms MIPS Division Instructions Summary
37
ECE 313 Fall 2004Lecture 8 - Mult. and Division37 MIPS Divide Instructions Divide Instructions div $s2, $s3 divu $s2, $s3 Results in Lo, Hi registers Hi: remainder Lo: quotient Divide pseudoinstructions div $s3, $s2, $s1# $s3 = $s2 / $s1 divu $s3, $s2, $s1 Software must check for overflow, divide-by-zero
38
ECE 313 Fall 2004Lecture 8 - Mult. and Division38 Outline - Multiplication and Division Multiplication Review: Shift & Add Multiplication Review: Booth’s Algorithm Combinational Multiplication MIPS Multiplication Instructions Division Division Algorithms MIPS Division Instructions Summary
39
ECE 313 Fall 2004Lecture 8 - Mult. and Division39 Summary - Multiplication and Division Multiplication Sequential multipliers - efficient but slow Combinational multipliers - fast but expensive Division is more complex and problematic What about divide by zero? Restore step needed to undo unwanted subtractions Nonrestoring division: combine restore w/ next subtract (see Problem 3.29) Take a Computer Arithmetic course for more details Coming Up: Floating Point
Similar presentations
© 2024 SlidePlayer.com Inc.
All rights reserved.