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CML CML CS 230: Computer Organization and Assembly Language Aviral Shrivastava Department of Computer Science and Engineering School of Computing and Informatics.

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Presentation on theme: "CML CML CS 230: Computer Organization and Assembly Language Aviral Shrivastava Department of Computer Science and Engineering School of Computing and Informatics."— Presentation transcript:

1 CML CML CS 230: Computer Organization and Assembly Language Aviral Shrivastava Department of Computer Science and Engineering School of Computing and Informatics Arizona State University Slides courtesy: Prof. Yann Hang Lee, ASU, Prof. Mary Jane Irwin, PSU, Ande Carle, UCB

2 CML CMLAnnouncements Quiz 2 Project 2 Quiz 3 –Thursday, Oct 06, 2009 –Complete Chapter 3 Project 3 –Implement an assembler

3 CML CMLMultiplication Binary makes it easy –Multiplier bit = 0  place 0 –Multiplier bit = 1  place multiplicand (2 32 -1)*(2 32 -1) = 2 64 – 2.2 32 + 1 – need 64-bits Multiplicand 1 0 0 0 Multiplier x 1 0 0 1 -------------- 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 ------------------ Product 1 0 0 1 0 0 0

4 CML CMLMultiplication Multiplicand 1 0 0 0 Multiplier x 1 0 0 1 -------------- 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 ------------------ Product 1 0 0 1 0 0 0 0 0 0 0 1 0 0 0 x 1 0 0 1 ---------------------------------- 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 ----------------------- 0 1 0 0 1 0 0 0 Multiplicand Product Multiplier 64-bit ALU 64-bit Control Shift leftShift right Add Write 64-bit Test What should be added in each step

5 CML CML Multiplication 0 0 0 0 1 0 0 0 x 1 0 0 1 ------------------------------------- 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 ----------------------- 0 1 0 0 1 0 0 0 8-bit Control Shift leftShift right Add Write 8-bit Test 00001000 1001 00000000 1. Initialize 2. Test, Add, Write 00001000 3. Shift left multiplicand, shift right multiplier 000100000100 4. Test 5. Shift left multiplicand, shift right multiplier 001000000010 6. Test 7. Shift left multiplicand, shift right multiplier 010000000001 8. Test, Add, Write 9. Shift left multiplicand, shift right multiplier 01001000 10000000 4-bit 10. Done 0000

6 CML CML Multiply Algorithm 2 Multiplicand 1 0 0 0 Multiplier x 1 0 0 1 -------------- 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 ------------------ Product 1 0 0 1 0 0 0 1 0 0 0 x 1 0 0 1 ------------------------------------ 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 ----------------------- 0 1 0 0 1 0 0 0 Partial Product at each step Multiplicand Product Multiplier 32-bit ALU 32-bit Control Shift right Add Write 64-bitShift right Test

7 CML CML Multiply Algorithm 2 4-bit Control Shift right Add Write 8-bit 1 0 0 0 x 1 0 0 1 ---------------------------- 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 ----------------------- 0 1 0 0 1 0 0 0 Shift right Test 4-bit 1001 1000 00000000 1. Initialize 2. Test, Add 3. Shift product right, shift multiplier right 10000000 4. Test 01000000 5. Shift product right, shift multiplier right 00100000 6. Test 00010000 7. Shift product right, shift multiplier right 10010000 8. Test, Add 9. Shift product right, shift multiplier right 01001000 10. Done 0100001000010000

8 CML CML Multiply Algorithm 2* Multiplicand 32-bit ALU 32-bit Control Add Write 64-bit 1 0 0 0 x 1 0 0 1 ------------------------------------- 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 ----------------------- 0 1 0 0 1 0 0 0 Shift right Multiplier Test

9 CML CMLMultiplication multu $rs $rt –Has 2 sources (32-bit registers) –No explicit destination Has 2 implicit destinations –$hi – upper 32-bits –$lo – lower 32-bits –Have to explicitly read these registers mflo $rd –Moves from $lo to $rd mfhi $rd –Moves from $hi to $rd Also mult – signed multiply –Multiply & then take care of the sign separately

10 CML CMLDivision 1001 Quotient --------------- Divisor 1000 | 1001010 - 1000 ----------- 10 101 1010 -1000 --------- 10 Remainder Divisor Remainder Quotient 64-bit ALU 64-bit Control Shift rightShift left Subtract Write 64-bitTest 32-bit Divisor 1000 Quotient 1001 Dividend: 1001010 0001010 0000010 Remainder

11 CML CML Division 1001 Quotient --------------- Divisor 1000 | 1001010 - 1000 ----------- 10 101 1010 -1000 --------- 10 Remainder 64-bit ALU 8-bit Control Shift rightShift left Add/Sub Write 8-bitTest 10000000 1. Initialize 0000 01001010 2. Subtract & test 5. Push 1 in quotient, shift divisor right 4-bit 6. Subtract & test 7. Restore remainder, push 0 in quotient, shift divisor right 8. Subtract & test 9. Restore remainder, push 0 in quotient, shift divisor right 10. Subtract & test 11. Push 1 in quotient, shift divisor right 11001010 3. Restore remainder, push 0 in quotient, shift divisor right 4. Subtract & test 12. Done 01001010 01000000 00001010 0001 00100000 1110101000001010 001000010000 1111101000001010 010000001000 00000010 100100000100

12 CML CMLDivision div, divu –$lo = $rs/$rt; $hi = $rs%$rt Need mflo and mfhi –Transfer results of div to normal registers Signed Division –Calculate the sign bit separately

13 CML CML Improved Division Instead of shifting divisor right –Shift remainder to left –Use the least significant bits of remainder to store the quotient Divisor 32-bit ALU 32-bit Control Add Write 64-bitShift right Remainder

14 CML CML Yoda says… Luke: I can’t believe it. Yoda: That is why you fail


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