1. - Microprocessor - Programming 8255 Mode 1 (slide 11-26 ) Prepared by: Mahmoud Abdullah Mahdi 20060243 (33)

2. Port A Port B INPUT PC4 PC5 PC3 PC2 PC1 PC0 INTE (A) INTE (B) Mode1 – Port A Mode1 – Port B INTR IBF STB INTR IBF STB PC6 & PC7I/O - Description of each pin : - Important Notice : - STB (PC4/PC2): The STROB input loads data into the port latch on a 0-to-1 transition 1. Input device sends the STB. - IFB (PC5/PC1): Input Buffer Full is an output indicating that the input latch containing information - INTR (PC3/PC0): Interrupt Request is an output that request an interrupt - INTE: The Interrupt Enable signal is neither an input nor an output; it is an internal bit programmed via the PC4 (port A) or PC2 (port B) - PC7 & PC6: They are general purpose I/O pins. 2. Input Device should not send STB, if IBF is logic ‘1’ 4. CPU sends INTA, after reading data from 8255 3. INTR tells the CPU to get the data from 8255

3. Port A Port B INPUT PC4 PC5 PC3 PC2 PC1 PC0 INTE (A) INTE (B) Mode1 – Port A Mode1 – Port B INTR IBF STB INTR IBF STB IBF INTR RD From I/O DeviceInside 8255 Inside µP PC6 & PC7I/O (Buffer Full) Int. Request Timing Diagram 1. Input device sends the STB. 2. Input Device should not send STB, if IBF is logic ‘1’ 3. INTR tells the CPU to get the data from 82554. CPU sends INTA, after reading data from 8255